Patents by Inventor Eiichiro Tomonaga

Eiichiro Tomonaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7995146
    Abstract: According to one embodiment, an image processing apparatus includes a scaling converter, a luminance histogram detector, a determination module, and a super resolution processor. The scaling converter converts a first image signal to a second image signal having more pixels. The luminance histogram detector detects a luminance histogram. The determination module determines whether the second image signal includes a graphics image based on the luminance histogram. The super resolution processor converts the second image signal to a third image signal with a higher resolution than that of the second image signal, and performs sharpening based on the reference gain. When the second image signal includes a graphics image, the super resolution processor sets the gain of sharpening below the reference gain.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: August 9, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Eiichiro Tomonaga
  • Patent number: 7817209
    Abstract: A buffer delays an input luminance signal by a 1-frame period. A screen unit motion detection section determines whether an image indicated by the input luminance signal is a moving image or a static image by a screen unit, and outputs a gradual determination result from the static image to the moving image. A subtracter outputs a differential signal obtained by subtracting the input luminance signal from the luminance signal delayed by the 1-frame period. A pixel unit motion detector detects motion of a pixel unit and outputs a detection result by using a plurality of level values within a predetermined range. A limiter limits the differential signal in accordance with the determination result of the screen unit motion detector. An adder adds an output signal of the multiplier and the input luminance signal together.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: October 19, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichiro Tomonaga, Himio Yamauchi
  • Publication number: 20100214472
    Abstract: According to one embodiment, an image processing apparatus includes a scaling converter, a luminance histogram detector, a determination module, and a super resolution processor. The scaling converter converts a first image signal to a second image signal having more pixels. The luminance histogram detector detects a luminance histogram. The determination module determines whether the second image signal includes a graphics image based on the luminance histogram. The super resolution processor converts the second image signal to a third image signal with a higher resolution than that of the second image signal, and performs sharpening based on the reference gain. When the second image signal includes a graphics image, the super resolution processor sets the gain of sharpening below the reference gain.
    Type: Application
    Filed: September 16, 2009
    Publication date: August 26, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Eiichiro Tomonaga
  • Patent number: 7742472
    Abstract: A signal processing apparatus includes, a receiving unit which receives a stream includes compression-encoded data via a network, the stream being formed by packets to which time stamps are respectively added, a generating unit which generates a first stream from the stream received by the receiving unit, based on the time stamps added to the packets in the stream received by the receiving unit to output the first stream from an output port, a selector to which has a first port that receives the first stream output from the output port and a second port that receives a second stream including compression-encoded data and being transmitted in real time from outside, the selector selecting one of the first stream input to the first port and the second stream input to the second port, and a decoding unit which decodes the one stream selected by the selector.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: June 22, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiichiro Tomonaga, Masahiro Yamada
  • Publication number: 20100066712
    Abstract: According an aspect of the invention, a video processing apparatus including: a sensor configured to measure an illuminance level; and a processing unit configured to receive a video signal and perform a gamma correction processing on the video signal to correct luminance of the video signal by using a correction value for the illuminance level so that the correction value becomes smaller as the illuminance level gets larger.
    Type: Application
    Filed: April 14, 2009
    Publication date: March 18, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Eiichiro TOMONAGA
  • Publication number: 20080239151
    Abstract: According to one embodiment, a video signal processing apparatus has a scaling processing unit configured to perform scaling processing on a video signal, an expansion processing unit configured to perform expansion processing on a video signal, and a switching unit configured to switch whether the scaling processing unit uses a video signal after being expanded by the expansion processing unit or uses the video signal before being expanded by the expansion processing unit according to a resolution of the video signal inputted to the expansion processing unit.
    Type: Application
    Filed: March 12, 2008
    Publication date: October 2, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Eiichiro Tomonaga, Toshiyuki Namioka
  • Publication number: 20070046825
    Abstract: A buffer delays an input luminance signal by a 1-frame period. A screen unit motion detection section determines whether an image indicated by the input luminance signal is a moving image or a static image by a screen unit, and outputs a gradual determination result from the static image to the moving image. A subtracter outputs a differential signal obtained by subtracting the input luminance signal from the luminance signal delayed by the 1-frame period. A pixel unit motion detector detects motion of a pixel unit and outputs a detection result by using a plurality of level values within a predetermined range. A limiter limits the differential signal in accordance with the determination result of the screen unit motion detector. An adder adds an output signal of the multiplier and the input luminance signal together.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 1, 2007
    Inventors: Eiichiro Tomonaga, Himio Yamauchi
  • Publication number: 20060197880
    Abstract: According to one embodiment, a reproduction control unit receives a time stamped stream TTS via a network. A TTS processing unit generates a real time stream TS from the TTS on the basis of the time stamp added to each packet of packets in the TTS. A decode unit decodes the TTS, and outputs video data and audio data in real time. A demultiplexer has a buffer which temporarily records the TTS provided from the reproduction control unit, and provides the TTS recorded in the buffer to the TTS processing unit and provides the same to the decode unit. As a result, the stream received from the network is transmitted and recorded to an external device in real time, and at the same time, the stream is reproduced in real time by a display device or the like.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 7, 2006
    Inventors: Eiichiro Tomonaga, Masahiro Yamada
  • Publication number: 20060140183
    Abstract: A signal processing apparatus includes, a receiving unit which receives a stream includes compression-encoded data via a network, the stream being formed by packets to which time stamps are respectively added, a generating unit which generates a first stream from the stream received by the receiving unit, based on the time stamps added to the packets in the stream received by the receiving unit to output the first stream from an output port, a selector to which has a first port that receives the first stream output from the output port and a second port that receives a second stream including compression-encoded data and being transmitted in real time from outside, the selector selecting one of the first stream input to the first port and the second stream input to the second port, and a decoding unit which decodes the one stream selected by the selector.
    Type: Application
    Filed: December 13, 2005
    Publication date: June 29, 2006
    Inventors: Eiichiro Tomonaga, Masahiro Yamada
  • Patent number: 6373904
    Abstract: A digital broadcast receiving device includes a first processor for extracting added information, a storage device for storing the added information, and a second processor having a low power consumption mode and a normal power mode, for effecting the circuit control for the watching and listening operation according to a preset program and the added information. The first processor informs the second processor that the added information is extracted, the second processor changes the mode thereof to the normal power mode when it is informed from the first processor that the added information is extracted while it is set in the low power consumption mode in the standby state, writes the added information extracted by the first processor into the storage device, and changes the mode thereof into the low power consumption mode after completion of the write operation.
    Type: Grant
    Filed: July 21, 1998
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Noriya Sakamoto, Masahiro Yamada, Atsushi Hirota, Natsuki Koshiro, Eiichiro Tomonaga, Tsukasa Kudo