Abstract: Each of shielding terminals is made of an electrically-conductive material, and includes a plate-shaped conducting plate portion, and a shielding shell of a tubular shape which is formed in an upstanding manner on the conducting plate portion, and is electrically connected to an electrically-conductive shielding member of a corresponding shielded wire. The conducting plate portions of the shielding terminals are held between a holder plate and an outer surface of a connector housing, and are disposed on the outer surface of the connector housing. These conducting plate portions are fixed to the connector housing by bolts and. The conducting plate portions are held in surface-to-surface contact with the outer surface of the connector housing.

Abstract: The present invention provides a photomask defect testing method, a photomask manufacturing method and a semiconductor integrated circuit manufacturing method. In the photomask defect testing method, reference data is created from corrected photomask design data that is corrected on the basis of an exposure transfer pattern, and sensor data is created by measuring the shape of the photomask based on the corrected photomask design data. Furthermore, first non-testing region data indicating non-testing regions including pattern portions having a predetermined width or less and pattern spaces having a predetermined value or less is extracted from the corrected photomask design data, the extracted first non-testing region data is stored so as to be included in the corrected photomask design data, the non-testing regions indicated by the first non-testing region data is excluded, and the reference data is compared with the sensor data, whereby defects on the photomask are detected.

Abstract: In a structure of fitting female and male connectors together, the female connector includes a female housing, and a female adapter which is provided on the female housing, and has a guide groove, and is fitted on a fitting portion provided at the male connector. The male connector includes a guide rib which is formed at the fitting portion, and is engageable in the guide groove. The female adapter can be rotated relative to the female housing to be placed at any of a plurality predetermined angular positions arranged with a fixed interval, and can be attached to the female housing. Only when the female adapter is rotated into a preselected one of the plurality predetermined angular positions, and is attached to the female housing of the female connector, the guide rib can be fitted in the guide groove, thereby allowing the female and male connectors to be fitted together.

Abstract: Each of shielding terminals is made of an electrically-conductive material, and includes a plate-shaped conducting plate portion, and a shielding shell of a tubular shape which is formed in an upstanding manner on the conducting plate portion, and is electrically connected to an electrically-conductive shielding member of a corresponding shielded wire. The conducting plate portions of the shielding terminals are held between a holder plate and an outer surface of a connector housing, and are disposed on the outer surface of the connector housing. These conducting plate portions are fixed to the connector housing by bolts and. The conducting plate portions are held in surface-to-surface contact with the outer surface of the connector housing.

Abstract: An inner housing is molded integrally with terminals such that portions of the inner housing fill respectively in through holes which are formed respectively in the terminals, and extend in a direction perpendicular to a direction of fitting and removing of a connector. The inner housing is disposed in a connector housing.

Abstract: A corrected mask pattern verification apparatus includes a graphic operation section for generating differential mask pattern data based on design mask pattern and corrected mask pattern; a graphic reduction-enlargement operation section for reducing the differential mask pattern data and enlarging the reduced differential mask pattern data, and generating graphic reduction-enlargement operation data; and an area comparison operation section for calculating an area of a differential mask pattern represented by the differential mask pattern data and comparing the calculated area with a prescribed area, and generating area comparison operation data indicating an area comparison operation result.

Abstract: A method for measuring aberration of an optical system that constitutes an interferometer comprises a step of disposing a reflecting member at an image point of the optical system and a step of detecting, by detection means, interference fringes formed based on light that has been emitted from a light source, transmitted through the optical system, caused to illuminate the reflecting member, reflected by the reflecting member and transmitted through the optical system again. The refractive index of the reflecting member with respect to the light is equal to or larger than 1.8.

Abstract: The present invention provides a photomask defect testing method, a photomask manufacturing method and a semiconductor integrated circuit manufacturing method. In the photomask defect testing method, reference data is created from corrected photomask design data that is corrected on the basis of an exposure transfer pattern, and sensor data is created by measuring the shape of the photomask based on the corrected photomask design data. Furthermore, first non-testing region data indicating non-testing regions including pattern portions having a predetermined width or less and pattern spaces having a predetermined value or less is extracted from the corrected photomask design data, the extracted first non-testing region data is stored so as to be included in the corrected photomask design data, the non-testing regions indicated by the first non-testing region data is excluded, and the reference data is compared with the sensor data, whereby defects on the photomask are detected.

Abstract: An electrostatic discharge protection device is provided at an input or output of a semiconductor integrated circuit for protecting an internal circuit from an electrostatic surge flowing into or out of the integrated circuit. The electrostatic discharge protection device may include a thyristor, and a trigger diode for triggering the thyristor (e.g., with a low voltage). The trigger diode may include an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the cathode region from another silicide layer formed on a surface of the anode region.

Abstract: A corrected mask pattern verification apparatus includes a graphic operation section for generating differential mask pattern data based on design mask pattern and corrected mask pattern; a graphic reduction-enlargement operation section for reducing the differential mask pattern data and enlarging the reduced differential mask pattern data, and generating graphic reduction-enlargement operation data; and an area comparison operation section for calculating an area of a differential mask pattern represented by the differential mask pattern data and comparing the calculated area with a prescribed area, and generating area comparison operation data indicating an area comparison operation result.

Abstract: A protection circuit for protecting a semiconductor device from being damaged due to an excessively high applied voltage, includes a P-type MOS transistor provided between an external input-output terminal and a power supply line, an N-type MOS transistor provided between the P-type MOS transistor and a ground line, a first thyristor provided between the external input-output terminal and the ground line, the anode portion being connected to the external input-output terminal side, and the cathode portion being connected to the ground line, a second thyristor provided between the power supply line and the ground line, the anode portion being connected to the power supply line, and the cathode portion being connected to the ground line, and a resistance portion provided at a predetermined location of a conductor extending from a branch node between the P-type and N-type MOS transistors to the power supply line via the P-type MOS transistor.

Abstract: An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.

Abstract: A protection circuit for protecting a semiconductor device from being damaged due to an excessively high applied voltage, includes a P-type MOS transistor provided between an external input-output terminal and a power supply line, an N-type MOS transistor provided between the P-type MOS transistor and a ground line, a first thyristor provided between the external input-output terminal and the ground line, the anode portion being connected to the external input-output terminal side, and the cathode portion being connected to the ground line, a second thyristor provided between the power supply line and the ground line, the anode portion being connected to the power supply line, and the cathode portion being connected to the ground line, and a resistance portion provided at a predetermined location of a conductor extending from a branch node between the P-type and N-type MOS transistors to the power supply line via the P-type MOS transistor.

Abstract: An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.

Abstract: An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.

Abstract: An electrostatic discharge protection device according to the present invention is provided at an input or an output of a semiconductor integrated circuit for protecting an internal circuit of the semiconductor integrated circuit from an electrostatic surge flowing into or out of the semiconductor integrated circuit. The electrostatic discharge protection device includes: a thyristor; and a trigger diode for triggering the thyristor with a low voltage. The trigger diode includes: an n-type cathode high impurity concentration region; a p-type anode high impurity concentration region; and an insulator section for electrically insulating a silicide layer formed on a surface of the n-type cathode high impurity concentration region from another silicide layer formed on a surface of the p-type anode high impurity concentration region.

Abstract: Each of insulation panels which form together an insulation layer is fixed on a tank body at one point at the center of the panel. An insulation material having elasticity at low temperature is filled in a joint between the adjacent panels. A heat insulator having elasticity at a given temperature and high heat insulating property is airtightly fitted in the joint. A balance hole for preventing pressure change is provided in the insulation layer.

Abstract: A tank body is covered at its outer surface with an insulation material and is supported by tank supports arranged on a bottom of an inner shell of a hull. A drainer for discharging leaked liquid is mounted each at least at four corners on a lower surface of the insulation material at the bottom of the tank body. A drip tray is arranged below each drainer. Sealing is provided between the tank support and the insulation material. Leaked liquid is reliably collected and disposed by the drip tray.

Abstract: A three-dimensional woven fabric for use in a battery is composed of three groups of filaments interlaced to form a three-dimensional weave, the filaments of one of the groups being formed of two kinds of electrode materials for a battery arranged parallely and alternately and the filaments of the other two groups serving as separators and being arranged so as to fix the filaments made of the electrode materials.

Abstract: A method for the formation of a three-dimensional woven fabric comprises causing arms of carriers disposed around one component yarns out of three mutually perpendicular component yarns and having the other two component yarns separately held thereon to be rotated, opposing carrier arms of adjacent carriers to each other thereby effecting transfer of yarns, and successively effecting said transfer of yarns to carrier arms of the subsequent carriers thereby enabling the two component yarns to be displaced and zigzagged relative to the remaining one component yarn. An apparatus for effecting the aforementioned method essentially comprises a multiplicity of carriers arrayed longitudinally and laterally on a carrier holding plate and means for imparting necessary movements to the carriers. The three-dimensional woven fabric can be formed in a desired shape or yarn arrangement by suitably varying the pattern of arrangement of the two component yarns.