Abstract: In cell retrieval processing, a cell list is acquired from a library, a classification file corresponding to the cell list is read to display a classification screen of setting a cell retrieval condition, and a cell satisfying the retrieval condition set through the classification screen is retrieved from the cell list. In logic diagram rendering processing, a location name described as an instance name in an HDL file is decoded, and a location attribute indicative of a location on the diagram is added to an instance to render a logic diagram. In instance arrangement processing, a location name indicative of an arrangement location on the diagram is set as an instance name for rendering. In instance movement processing, the instance name of an instance is changed to a location name indicative of a specified movement location for rendering. In attribute display processing, attributes of pins and nets are read for display nearby.

Abstract: A management node at first extracts free computation nodes executing none of jobs in order to assign a new job to any one of computation nodes, and specifies a communication target computation node when executing an execution target job. Subsequently, the management node calculates, with respect to all of the computation nodes executing none of the jobs at that point of time, a determination value Vi on the basis of a power saving mode transition rate Si and an average value Di of distance counts from the communication target node, and specifies the free computation node having the maximum determination value Vi as the execution target job assignment destination.

Abstract: An image pickup apparatus includes: a flash photography unit that performs image pickup of one of the plurality of images by causing a flash device to emit light during the image pickup in accordance with an exposure; a region setting unit for setting a plurality of motion vector measurement regions for which a motion vector is measured; a motion vector reliability calculation unit for calculating a reliability of respective motion vectors; and a main region detection unit for detecting a main region from the image photographed by the flash photography unit. A motion vector integration processing unit includes a contribution calculation unit for calculating a contribution of the respective motion vectors from a positional relationship between the respective motion vector measurement regions and the main region, and integrates the motion vectors of the plurality of motion vector measurement regions in accordance with the reliability and the contribution.

Abstract: An image processing apparatus includes a high-resolution processing unit configured to restore, with respect to an image desired to be displayed, a frequency band higher than a frequency band of the recorded image, using one of one electronically recorded image and a plurality of electronically recorded images obtained by continuous shooting. The image processing apparatus further includes a local region designation unit configured to designate a region of the image desired to be displayed where the resolution is increased, and an estimation display unit configured to display, as a finish estimation image after high-resolution processing is applied to the image desired to be displayed, the result of the high-resolution processing applied to a local region, designated by the local region designation unit, by the high-resolution processing unit.

Abstract: In an image distribution system which distributes an electronically recorded image to a client terminal through a server, when a high-resolution image of a desired image requested from the client terminal is produced using a single image or plural images recorded in an image recording unit in a high-resolution processing unit on the side of the server, a desired parameter in parameters which can be specified by the client terminal is transmitted from the client terminal to the server, the parameters including a part of or all items of quality parameter for setting the image quality of the produced image for the desired image. On the side of the server, the high-resolution image whose image quality is controlled by the quality parameter is produced and distributed to the client terminal.

Abstract: In an image acquisition apparatus, RAW data obtained in image acquisition with an imager in which a color filter is disposed in a front face is divided into each identical color by a RAW data dividing unit, a compression coding processing unit produces coded data of each color by compressing the RAW data at a compression rate controlled for each color, and the coded data of each color is recorded in a recording unit. A motion compensation unit compensates a relative positional relationship between frames by estimating a motion of a subject between frames of plural images, using specific color division coded data which is decoded by the compression coding processing unit and a RAW format data reproducing unit, the specific color division coded data being coded data of a color close to a peak of spectral sensitivity of human vision in the coded data of each color.

Abstract: A Hardware Description Language (HDL) processing method is implemented in a computer and processes a HDL file which is written in HDL having a hierarchical structure including three or more hierarchical levels in a Computer-Aided Design (CAD) which supports hardware design. The HDL processing method analyzes the hierarchical structure of the HDL and obtaining an analysis result, and processes the HDL one at a time for each hierarchical level based on the analysis result or, process the HDL one at a time by a parallel distributed processing for each hierarchical level based on the analysis result.

Abstract: A logic circuit described in the netlist style HDL and a lower-level logic circuit (lower-level module) of a library which corresponds to an instance in the logic circuit and is described in the RTL style are read to a logic circuit storage unit by a logic circuit reading unit. A library hierarchical expansion unit performs a process of expanding a hierarchy of the library with respect to the instance in the logic circuit and converts it to the RTL style. An assignment statement eliminating unit replaces and eliminates an assignment statement in the logic circuit, which is converted to the RTL style. A logic circuit output unit outputs the logic circuit, which has undergone the conversion, in the RTL style. If the logic circuit of the library is described in the netlist style HDL, it is converted to an RTL style HDL as well as the case of the logic circuit.

Abstract: A storage medium stores a power consumption analysis program operable to cause a computer to function as a power consumption analysis apparatus. The apparatus includes a device for preliminarily providing a first toggle rate of each of a plurality of wirelines included in a first circuit data set; a device for generating a correlation in accordance with each first toggle rate and each load capacity of the corresponding wireline, each correlation being indicative of a relationship between the first toggle rate and the load capacity; and a device for calculating a second toggle rate of each of a plurality of wirelines included in a second circuit data set, in accordance with a load capacity of a corresponding wireline and the corresponding correlation.

Abstract: Information of a logic circuit including a hierarchical structure and connection target information up to a connection target including a pin or a net via hierarchies of the logic circuit are read, and a tree structure in which a hierarchy is taken as a node and a connection target is taken as a leaf is produced. The tree structure is referred from its root, and a node from which the tree branches is set to an uppermost node. A leaf the connection target of which is a net is searched from the tree structure, and a hierarchy port or a net in a lower hierarchy is added as a leaf to a lower hierarchy node connected with a net via a hierarchy port. Connection processing is performed to the tree structure from bottom up and the information on the logic circuit is rewritten, and the logic circuit information is outputted.

Abstract: In cell retrieval processing, a cell list is acquired from a library, a classification file corresponding to the cell list is read to display a classification screen of setting a cell retrieval condition, and a cell satisfying the retrieval condition set through the classification screen is retrieved from the cell list. In logic diagram rendering processing, a location name described as an instance name in an HDL file is decoded, and a location attribute indicative of a location on the diagram is added to an instance to render a logic diagram. In instance arrangement processing, a location name indicative of an arrangement location on the diagram is set as an instance name for rendering. In instance movement processing, the instance name of an instance is changed to a location name indicative of a specified movement location for rendering. In attribute display processing, attributes of pins and nets are read for display nearby.

Abstract: A logic circuit described in the netlist style HDL and a lower-level logic circuit (lower-level module) of a library which corresponds to an instance in the logic circuit and is described in the RTL style are read to a logic circuit storage unit by a logic circuit reading unit. A library hierarchical expansion unit performs a process of expanding a hierarchy of the library with respect to the instance in the logic circuit and converts it to the RTL style. An assignment statement eliminating unit replaces and eliminates an assignment statement in the logic circuit, which is converted to the RTL style. A logic circuit output unit outputs the logic circuit, which has undergone the conversion, in the RTL style. If the logic circuit of the library is described in the netlist style HDL, it is converted to an RTL style HDL as well as the case of the logic circuit.

Abstract: A logic circuit design method for use in a logic circuit having a hierarchical structure including an instance, a first block, and a second block is disclosed. The logic circuit design method includes the steps of reading information about the logic circuit, moving an instance which has a signal connection and a first hierarchical port connected thereto from a first block to a second block in accordance with the read information, creating a second hierarchical port in accordance with the movement of the instance, and disconnecting the instance from the first hierarchical port and connecting the instance to the second hierarchical port while maintaining the signal connection to the instance that the instance had at the time when the instance was moved from the first block to the second block.

Abstract: A noise estimating device includes a plurality of sensors and an estimating section. The sensors are configured and arranged to be positioned in a plurality of prescribed locations on a vehicle body of a vehicle. The sensors are configured and arranged to detect vibrations of the vehicle body. The estimating section is configured to estimate an external vibration value based on the vibrations detected by the sensors and transfer characteristics between the sensors and a vibration input location where an external vibration enters the vehicle body. The estimating section is further configured to estimate a noise within a vehicle interior space based on the external vibration value and a transfer characteristic between the vibration input location and a reference region in the vehicle interior space.

Abstract: A logic circuit design method for use in a logic circuit having a hierarchical structure including an instance, a first block, and a second block is disclosed. The logic circuit design method includes the steps of reading information about the logic circuit, moving an instance which has a signal connection and a first hierarchical port connected thereto from a first block to a second block in accordance with the read information, creating a second hierarchical port in accordance with the movement of the instance, and disconnecting the instance from the first hierarchical port and connecting the instance to the second hierarchical port while maintaining the signal connection to the instance that the instance had at the time when the instance was moved from the first block to the second block.

Abstract: In a manufacturing method for injection-molded and in-mold decorated articles including injection of molding resin (4) into a molding space (3) defined by a decorating film (5) and a mold (1), the molding space has a product molding space (31) and a resin-discharging-use molding space (33) which is formed around the product molding space and into which the molding resin is let to flow for discharge of the molding resin from the product molding space. The molding resin is injected into the product molding space, and while part of the injected molding resin is discharged from the product molding space into the resin-discharging-use molding space, the molding resin is filled into the product molding space.

Abstract: The present invention as disclosed hereby is to provide a drawing input apparatus, drawing input program and drawing input method. The drawing input apparatus comprising: a drawing inputting/editing portion adapted to input or edit drawing data; a rule information storing portion adapted to store therein rule information defining rules for inputting or editing the drawing data; and a rule checking portion adapted to check by using the rule information a part which is present in the drawing data and which is modified based on a predetermined operation on the condition that said drawing inputting/editing portion executes such a predetermined operation.

Abstract: A graphic object designating apparatus for designating a graphic object to be edited among graphic objects present in an edit area of a graphics editing system according to the position of a mouse cursor. The apparatus includes an object managing section that manages object information and the mouse cursor position, and a rule storage section in which assignments of key entries for indicating a direction in which the mouse cursor should move and for designating an object directly under the mouse cursor have previously been stored as rules. A trigger processing section generates a mouse cursor moving trigger or an object designating trigger according to the key entries and the rules. An object designating section moves the mouse cursor or designates the object to be edited on the basis of the object information and the triggers. The apparatus allows an operator to designate a desired object easily within the object display screen.

Abstract: A logical circuit is configured by connecting a plurality of circuit blocks. A driving ability value computation unit computes a driving ability value required for a target circuit block based on a delay rate of the circuit block indicating a rate of delay of a signal traveling in the circuit block by a load capacity value provided by the circuit block, a driving ability value of a prior stage circuit block prior to the target circuit block, and a load capacity value provided for the target circuit block. A change unit changes the specification of the device used in the target circuit block based on the driving ability value obtained by the driving ability value computation unit.

Abstract: A logical circuit is configured by connecting a plurality of circuit blocks. A driving ability value computation unit computes a driving ability value required for a target circuit block based on a delay rate of the circuit block indicating a rate of delay of a signal traveling in the circuit block by a load capacity value provided by the circuit block, a driving ability value of a prior stage circuit block prior to the target circuit block, and a load capacity value provided for the target circuit block. A change unit changes the specification of the device used in the target circuit block based on the driving ability value obtained by the driving ability value computation unit.