Patents by Inventor Eiji Kume
Eiji Kume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8901605Abstract: There is provided a semiconductor wafer including a base wafer whose surface is entirely or partially a silicon crystal plane, an inhibitor positioned on the base wafer to inhibit crystal growth and having an opening that reaches the silicon crystal plane, a first crystal layer made of SixGe1-x (0?x<1) and positioned on the silicon crystal plane that is exposed in the opening, a second crystal layer positioned on the first crystal layer and made of a III-V Group compound semiconductor that has a band gap width larger than a band gap width of the first crystal layer, and a pair of metal layers positioned on the inhibitor and the second crystal layer. The pair of the metal layers are each in contact with the first crystal layer and the second crystal layer.Type: GrantFiled: September 5, 2013Date of Patent: December 2, 2014Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Tomoyuki Takada, Sadanori Yamanaka, Masao Shimada, Masahiko Hata, Taro Itatani, Hiroyuki Ishii, Eiji Kume
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Publication number: 20140008698Abstract: There is provided a semiconductor wafer including a base wafer whose surface is entirely or partially a silicon crystal plane, an inhibitor positioned on the base wafer to inhibit crystal growth and having an opening that reaches the silicon crystal plane, a first crystal layer made of SixGe1-x (0?x<1) and positioned on the silicon crystal plane that is exposed in the opening, a second crystal layer positioned on the first crystal layer and made of a III-V Group compound semiconductor that has a band gap width larger than a band gap width of the first crystal layer, and a pair of metal layers positioned on the inhibitor and the second crystal layer. The pair of the metal layers are each in contact with the first crystal layer and the second crystal layer.Type: ApplicationFiled: September 5, 2013Publication date: January 9, 2014Applicants: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Tomoyuki TAKADA, Sadanori YAMANAKA, Masao SHIMADA, Masahiko HATA, Taro ITATANI, Hiroyuki ISHII, Eiji KUME
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Patent number: 6815708Abstract: An optic superconducting circuit element (10) is disclosed that is operable to transmit and receive on an identical chip an electromagnetic wave having frequencies in an extended frequency band ranging from microwave to THz frequency bands and with high sensitivity. The optic superconducting circuit element (10) includes the chip (3), and a superconducting electromagnetic wave oscillating (generating and transmitting) source (16) and a superconducting Josephson junction device (14) disposed in close vicinity to each other on the chip (3), the superconducting Josephson junction device (14) detecting the electromagnetic wave transmitted from the superconducting electromagnetic wave oscillating (generating and transmitting) source (16).Type: GrantFiled: February 8, 2002Date of Patent: November 9, 2004Assignee: Japan Science and Technology AgencyInventors: Ienari Iguchi, Eiji Kume
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Patent number: 5555215Abstract: The present invention is intended to operate a semiconductor device at high speed with low voltage. A circuit configuration is used in which the transfer impedance between a common I/O line and a data line is changed depending on whether information is to be read or written. A current/voltage converter is provided which includes a MISFET different in conduction type to a select MISFET. Thus, the speed of reading information is increased. An intermediate voltage generator having high driving capability is provided. Thus, the circuit has sufficient driving capability for an LSI having large load capacitance. A voltage converter is provided which converts a data line supply voltage or word line supply voltage to a higher voltage. Therefore, stabilized signal transmission is ensured.Type: GrantFiled: October 5, 1995Date of Patent: September 10, 1996Assignees: Hitachi, Ltd, Hitachi ULSI Engineering CorporationInventors: Yoshinobu Nakagome, Kiyoo Itoh, Hitoshi Tanaka, Yasushi Watanabe, Eiji Kume, Masanori Isoda, Eiji Yamasaki, Tatsumi Uchigiri
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Patent number: 5526313Abstract: Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.Type: GrantFiled: August 10, 1993Date of Patent: June 11, 1996Assignees: Hitachi Ltd., Hitachi VLSI Engineering CorporationInventors: Jun Etoh, Kiyoo Itoh, Yoshiki Kawajiri, Yoshinobu Nakagome, Eiji Kume, Hitoshi Tanaka
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Patent number: 5297097Abstract: Disclosed is a one-chip ULSI which can carry out fixed operations for a wide range of power supply voltages (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which provides a fixed internal voltage for a wide range of power supply voltages, an input/output buffer which can be adapted to several input/out interface levels, a dynamic or volatile RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.Type: GrantFiled: June 14, 1989Date of Patent: March 22, 1994Assignees: Hitachi Ltd., Hitachi VLSI EngineeringInventors: Jun Etoh, Kiyoo Itoh, Yoshiki Kawajiri, Yoshinobu Nakagome, Eiji Kume, Hitoshi Tanaka
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Patent number: 5280450Abstract: A semiconductor integrated circuit is disclosed, in which a group of sense amplifiers activated at the same time by a selection signal on a selection signal line are divided into a plurality of blocks, and a power-source line for driving sense amplifiers is formed for each sense amplifier block so as to cross the selection signal line. Alternatively, an input/output line is divided into a plurality of sub-input/output lines, and a plurality of input/output lines are formed so that each input/output line crosses its sub-input/output lines, to form a hierarchical structure with respect to input/output lines. Thus, the load capacitance of each power-source line is reduced, and the time constant of each of the charging and discharging of the load capacitance is decreased. That is, the above semiconductor integrated circuit can operate at high speed.Type: GrantFiled: May 6, 1991Date of Patent: January 18, 1994Assignees: Hitachi, Ltd., Hitachi VLSI Engineering CorporationInventors: Yoshinobu Nakagome, Eiji Kume, Kiyoo Itoh, Hitoshi Tanaka
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Patent number: 5264743Abstract: The present invention is intended to operate a semiconductor device at high speed with low voltage. A circuit configuration is used in which the transfer impedance between a common I/O line and a data line is changed depending on whether information is to be read or written. A current/voltage converter is provided which includes a MISFET different in conduction type to a select MISFET. Thus, the speed of reading information is increased. An intermediate voltage generator having high driving capability is provided. Thus, the circuit has sufficient driving capability for an LSI having large load capacitance. A voltage converter is provided which converts a data line supply voltage or word line supply voltage to a higher voltage. Therefore, stabilized signal transmission is ensured.Type: GrantFiled: November 29, 1990Date of Patent: November 23, 1993Assignees: Hitachi, Ltd., Hitachi VLSI Engineering CorporationInventors: Yoshinobu Nakagome, Kiyoo Itoh, Hitoshi Tanaka, Yasushi Watanabe, Eiji Kume, Masanori Isoda, Eiji Yamasaki, Tatsumi Uchigiri
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Patent number: 5262999Abstract: Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.Type: GrantFiled: March 24, 1992Date of Patent: November 16, 1993Assignees: Hitachi, Ltd., Hitachi VLSI Engineering CorporationInventors: Jun Etoh, Kiyoo Itoh, Yoshiki Kawajiri, Yoshinobu Nakagome, Eiji Kume, Hitoshi Tanaka
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Patent number: RE37593Abstract: Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.Type: GrantFiled: June 10, 1998Date of Patent: March 19, 2002Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Jun Etoh, Kiyoo Itoh, Yoshiki Kawajiri, Yoshinobu Nakagome, Eiji Kume, Hitoshi Tanaka