Patents by Inventor Eiji Oda

Eiji Oda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4805026
    Abstract: The invention provides a method for driving a CCD area image sensor. An interline transfer type CCD area image sensor includes a plurality of photo sensors arranged in a plurality of lines. A plurality of vertical shift registers are disposed along one of the lines of photo sensors. A horizontal shift register is formed to receive charges from the vertical shift registers. An output circuit converts the charges transferred through the horizontal shift resistor into electrical signals. The driving method includes the steps of accumulating charges in the photo sensors, transferring charges accumulated in all of the photo sensors to the vertical shift registers, and shifting the transferred charges to the horizontal shift register via the vertical shift registers. The start of charge-shiftings is initiated from the charges in the order of the distances between the transferred position and the photo sensors and the horizontal shift register.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: February 14, 1989
    Assignee: NEC Corporation
    Inventor: Eiji Oda
  • Patent number: 4694476
    Abstract: A buried channel CCD is described wherein buried CCD elements are formed on a semiconductor substrate of P-type material and formed in a semiconductor area of N-type material. Transfer electrodes are provided to which a driving pulse is applied. The driving pulse is a three-level pulse having, at different time points, first, second and third levels, during at least one part of a time period in a charge transfer period and a charge integration period, the first or second level of the three-level pulse is applied to selected transfer electrodes so that part of signal charges in the buried channel are drained through the semiconductor area into the semiconductor substrate; and in the charge transfer period, the second and third levels are alternately applied to the transfer electrodes.
    Type: Grant
    Filed: September 19, 1986
    Date of Patent: September 15, 1987
    Assignee: NEC Corporation
    Inventor: Eiji Oda
  • Patent number: 4601098
    Abstract: A semiconductor device has an active region formed on a semiconductor substrate. The opposite sides of the active region are defined by channel stoppers. The semiconductor device is made by a manufacturing process which prevents the active region from narrowing responsive a spreading of the channel stopper into the active region.
    Type: Grant
    Filed: November 15, 1984
    Date of Patent: July 22, 1986
    Assignee: NEC Corporation
    Inventor: Eiji Oda
  • Patent number: 4527182
    Abstract: A semiconductor imager comprises a first and a second region (41, 42) which have a conductivity type opposite to a substrate (21) and are reverse biassed relative to the substrate beneath photosensitive regions (22) of each row and a reading device (26, 33) for the row, respectively, to be completely and not to be completely depleted, respectively. The imager may or may not comprise such a covering region (77) on each photosensitive region as may have the conductivity type of the first and the second regions and be not completely depleted. It is possible to provide a line sensor or a photodiode of a similar structure. Preferably, the first and the second regions have a common impurity concentration lower than the photosensitive regions and are respectively thinner and thicker relative to each other. The covering region preferably has the impurity concentration of each channel stopper (23).
    Type: Grant
    Filed: September 21, 1981
    Date of Patent: July 2, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Yasuo Ishihara, Eiji Oda, Nobukazu Teranishi
  • Patent number: 4521797
    Abstract: A two-dimensional, imaging device has a semiconductor substrate of one conductivity type, an orthogonal array of photosensitive regions of opposite conductivity type, charge transfer gates and charge transfer channels separating columns of the orthogonal array. A gate pulse generator applies a gate pulse to the charge transfer gates. A clock pulse generator applies a two phase clock to the charge transfer channels. The charge transfer channels include electrode pairs, each of which is formed by a charge storage electrode and a potential barrier electrode which are arranged so that a charge storage electrode of one pair is connected to a potential barrier electrode of an adjacent pair, to receive the same clock pulse.
    Type: Grant
    Filed: January 11, 1982
    Date of Patent: June 4, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Eiji Oda