Patents by Inventor Eiji Ohue

Eiji Ohue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040213580
    Abstract: The present invention provides an optical transmitter using a multiplexer which can maintain a timing margin between a clock and data as an operating reference at an optimal value when data transmission speed, or data rate to be handled is changed.
    Type: Application
    Filed: November 21, 2002
    Publication date: October 28, 2004
    Applicants: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toru Masuda, Kenichi Ohhata, Nobuhiro Shiramizu, Eiji Ohue, Katsuyoshi Washio
  • Patent number: 6785477
    Abstract: A large time constant is caused due to parasitic capacitance at an anode terminal of a photodetector of an optical receiver. Therefore, an optical receiver wherein a variable negative capacitor mainly including an NPN-type transistor operable at high speed is configured and is connected to the input terminal of a preamplifier to which the output of the photodetector is input so that parasitic capacitance caused in the photodetector and due to packaging is equivalently reduced and the fluctuation of parasitic capacitance caused due to manufacturing dispersion is also compensated is provided.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: August 31, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toru Masuda, Katsuyoshi Washio, Taizo Yoshikawa, Eiji Ohue, Kenichi Ohhata
  • Patent number: 6521974
    Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: February 18, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsuya Oda, Eiji Ohue, Masao Kondo, Katsuyoshi Washio, Masamichi Tanabe, Hiromi Shimamoto
  • Patent number: 6482710
    Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: November 19, 2002
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Katsuya Oda, Eiji Ohue, Masao Kondo, Katsuyoshi Washio, Masamichi Tanabe, Hiromi Shimamoto
  • Publication number: 20010017399
    Abstract: A bipolar transistor according to the invention is provided with structure that an intrinsic base made of single crystal Si—Ge and a base leading-out electrode are connected via a link base made of polycrystal Si—Ge by doping at high concentration, further, a part immediately under the intrinsic base has the same conductive type as that of a collector and in a peripheral part, a single crystal Si—Ge layer having the same conductive type as that of a base is provided between the intrinsic base and a collector layer. Hereby, the reduction of the resistance of the link base between the intrinsic base and the base leading-out electrode and the reduction of capacitance between the collector and the base are simultaneously realized, and a self-aligned bipolar transistor wherein capacitance between an emitter and the base and capacitance between the collector and the base are respectively small, power consumption is small and high speed operation is enabled is acquired.
    Type: Application
    Filed: March 20, 2001
    Publication date: August 30, 2001
    Inventors: Katsuya Oda, Eiji Ohue, Masao Kondo, Katsuyoshi Washio, Masamichi Tanabe, Hiromi Shimamoto
  • Patent number: 5962880
    Abstract: A self-aligned bipolar transistor which has a small base resistance and small emitter-base and collector-base capacitances and is operable at high speed is disclosed. This bipolar transistor is characterized in that a low concentration collector region made of single crystal Si--Ge is self-alignedly formed between an intrinsic base of single crystal Si--Ge and an intrinsic base, and that an extrinsic base electrode and an intrinsic base are connected only through a doped external base. With this arrangement, an energy barrier is not established at the collector base interface owing to the formation of the low concentration region of single crystal Si--Ge, so that the transit time of the carriers charged from the emitter is shortened. The connection between the intrinsic base and the extrinsic base electrode via the doped external base results in the reduction of the base resistance.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: October 5, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Oda, Eiji Ohue, Takahiro Onai, Katsuyoshi Washio