Patents by Inventor Eiji Oki

Eiji Oki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7978713
    Abstract: A network is realized having GMPLS and IP/MPLS mixed, in which an IP/MPLS node can be operated as is without replacing the IP/MPLS node with a node having a GMPLS function, even if the GMPLS and IP/MPLS are mixed. To match with the protocol of the IP/MPLS node outside of a GMPLS cloud, the GMPLS+IP/MPLS node (edge) establishes a PSC-LSP between GMPLS+IP/MPLS nodes (edge), uses the PSC-LSP as an IP/MPLS link from the viewpoint of the IP/MPLS node, and operates signaling of an MPLS-LSP establishment requested from the IP/MPLS.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: July 12, 2011
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Daisaku Shimazaki, Kohei Shiomoto, Naoaki Yamanaka
  • Publication number: 20110016997
    Abstract: A bush bearing 1 is comprised of: a synthetic resin-made bush 15 including a flexible semi-split cylindrical body 5 having an abutment portion 3 for slidably abutting against a rack shaft 25 and including a flexible open-ended annular body 14 which has a portion 6 formed integrally at one end face of the semi-split cylindrical body 5 and circular arc-shaped extended portions 12 and 13 whose distal ends 9 and 10 are opposed to each other with a clearance 11 in a circumferential direction R; and an elastic member 22 including an elastic body 21 for abutting against an outer surface 20 of the semi-split cylindrical body 5 and retained portions 16 and 17 which are respectively retained by both end portions 23 and 24.
    Type: Application
    Filed: March 30, 2009
    Publication date: January 27, 2011
    Inventors: Eiji Oki, Hidetoshi Kaida
  • Publication number: 20100278467
    Abstract: A bearing mechanism 1 includes a housing 3 having a cylindrical inner peripheral surface 2, a rack shaft 5 inserted and secured in the housing 3 and having a cylindrical outer peripheral surface 4, and a sliding bearing 6 interposed between the inner peripheral surface 2 of the housing 3 and the outer peripheral surface 4 of the rack shaft 5.
    Type: Application
    Filed: October 21, 2008
    Publication date: November 4, 2010
    Inventors: Masahiko Hirose, Yoshihide Ohara, Masaaki Hashimoto, Takahiro Tanaka, Hidetoshi Kaida, Eiji Oki
  • Patent number: 7720390
    Abstract: An economical optical network is constituted by effectively using network resources by using the minimum number of, or minimum capacity of 3R repeaters. 3R section information corresponding to topology information on the optical network to which an optical node device itself belongs is stored, and the 3R section information stored is referred so as to autonomously determine whether or not the optical node device itself is an optical node device for implementing the 3R relay when setting an optical path passing through the optical node device itself. Alternatively, when the optical node device itself is a source node, another optical node device for implementing the 3R relay among the other optical node devices through which the optical path from the optical node device itself to the destination node passes is identified, and this identified optical node device is requested to implement the 3R relay when setting an optical path in which the optical node device itself is a source node.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: May 18, 2010
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Akira Misawa, Masaru Katayama, Satoru Okamoto
  • Publication number: 20100040367
    Abstract: An economical optical network is constituted by effectively using network resources by using the minimum number of, or minimum capacity of 3R repeaters. 3R section information corresponding to topology information on the optical network to which an optical node device itself belongs is stored, and the 3R section information stored is referred so as to autonomously determine whether or not the optical node device itself is an optical node device for implementing the 3R relay when setting an optical path passing through the optical node device itself. Alternatively, when the optical node device itself is a source node, another optical node device for implementing the 3R relay among the other optical node devices through which the optical path from the optical node device itself to the destination node passes is identified, and this identified optical node device is requested to implement the 3R relay when setting an optical path in which the optical node device itself is a source node.
    Type: Application
    Filed: October 20, 2009
    Publication date: February 18, 2010
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Eiji OKI, Akira MISAWA, Masaru KATAYAMA, Satoru OKAMOTO
  • Patent number: 7630649
    Abstract: An economical optical network is constituted by effectively using network resources by using the minimum number of, or minimum capacity of 3R repeaters. 3R section information corresponding to topology information on the optical network to which an optical node device itself belongs is stored, and the 3R section information stored is referred so as to autonomously determine whether or not the optical node device itself is an optical node device for implementing the 3R relay when setting an optical path passing through the optical node device itself. Alternatively, when the optical node device itself is a source node, another optical node device for implementing the 3R relay among the other optical node devices through which the optical path from the optical node device itself to the destination node passes is identified, and this identified optical node device is requested to implement the 3R relay when setting an optical path in which the optical node device itself is a source node.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: December 8, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Akira Misawa, Masaru Katayama, Satoru Okamoto
  • Publication number: 20090196608
    Abstract: An economical optical network is constituted by effectively using network resources by using the minimum number of, or minimum capacity of 3R repeaters. 3R section information corresponding to topology information on the optical network to which an optical node device itself belongs is stored, and the 3R section information stored is referred so as to autonomously determine whether or not the optical node device itself is an optical node device for implementing the 3R relay when setting an optical path passing through the optical node device itself. Alternatively, when the optical node device itself is a source node, another optical node device for implementing the 3R relay among the other optical node devices through which the optical path from the optical node device itself to the destination node passes is identified, and this identified optical node device is requested to implement the 3R relay when setting an optical path in which the optical node device itself is a source node.
    Type: Application
    Filed: April 2, 2009
    Publication date: August 6, 2009
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Eiji OKI, Akira MISAWA, Masaru KATAYAMA, Satoru OKAMOTO
  • Patent number: 7545829
    Abstract: A layered network node of which a network it belongs is divided up into cells which are constituted by a plurality of nodes; the cells are defined as virtual nodes; if links exist which connect the interiors of the virtual nodes and the exterior, contact points between them are defined as interfaces of the virtual nodes; the virtual network constituted by the virtual nodes is further divided up into cells and making them into virtual nodes; said virtual network is defined as a network of a higher level with respect to the initial virtual network; by performing said operation of division into cells and making into virtual nodes once or a plurality of times, the layered network is constituted; path computation is performed from the source node to a destination node in a stepwise manner by dispersing it over the various layers.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: June 9, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Daisaku Shimazaki, Eiji Oki, Naoaki Yamanaka
  • Publication number: 20090052895
    Abstract: An economical optical network is constituted by effectively using network resources by using the minimum number of, or minimum capacity of 3R repeaters. 3R section information corresponding to topology information on the optical network to which an optical node device itself belongs is stored, and the 3R section information stored is referred so as to autonomously determine whether or not the optical node device itself is an optical node device for implementing the 3R relay when setting an optical path passing through the optical node device itself. Alternatively, when the optical node device itself is a source node, another optical node device for implementing the 3R relay among the other optical node devices through which the optical path from the optical node device itself to the destination node passes is identified, and this identified optical node device is requested to implement the 3R relay when setting an optical path in which the optical node device itself is a source node.
    Type: Application
    Filed: October 22, 2008
    Publication date: February 26, 2009
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Akira Misawa, Masaru Katayama, Satoru Okamoto
  • Patent number: 7474664
    Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: January 6, 2009
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
  • Patent number: 7457240
    Abstract: The present invention relates to a node, a packet communication network, and a packet communication method and program. The node of the present invention is one which includes a section which advertises to other nodes link state information which indicates the state of links which are connected to this node, a section which establishes a packet forwarding path according to the link state information which is included in the advertisement by the advertisement section, and a traffic observation section which observes the traffic and outputs its observations as traffic observation results.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: November 25, 2008
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Daisaku Shimazaki, Naoaki Yamanaka
  • Patent number: 7339935
    Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: March 4, 2008
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
  • Patent number: 7333424
    Abstract: An upper layer node is used in a multi-layer network which includes an upper layer network which performs switching and transfer in units of packets, and a lower layer network which includes optical transmission lines and optical switches and accommodate the upper layer network; this upper layer node being connected to the lower layer network which includes lower layer nodes including obstruction restoration sections, and transmission lines, and including: a section which detects the occurrence of an obstruction upon a transmission line which it accommodates; a section which advertises the detection result as obstruction information; a section which retains the topology information for the network; a section which updates the retained topology information according to advertised obstruction information, or obstruction information which it has detected; and an advertisement transfer section which advertises to other upper layer nodes the advertised obstruction information.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: February 19, 2008
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Naoaki Yamanaka, Eiji Oki, Kohei Shiomoto, Satoru Okamoto, Wataru Imajuku
  • Patent number: 7313328
    Abstract: A multi-layer photonic network and nodes used therein are provided. The multi-layer photonic network comprises a packet network which performs switching and transfer in packet units, and a photonic network comprising optical transmission lines and photonic switches, and which accommodates the packet network. The multi-layer photonic network also has a two layer structure of optical wavelength links (O-LSPs) and packet links (E-LSPs). The O-LSPs are constituted by the optical transmission lines and comprise optical wavelength switching capability (LSC) which is capable of switching in optical wavelength units and packet switching capability (PSC) which is capable of switching in packet units at both their ends. The E-LSPs include the O-LSPs and PSCs at both their ends. Each node includes a section for automatically establishing an O-LSP according to an establishment request for an E-LSP while taking account of path information including path cost, resource consumption, and traffic quantity.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: December 25, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Wataru Imajuku, Kohei Shiomoto, Naoaki Yamanaka, Daisaku Shimazaki, Naohide Nagatsu, Yoshihiro Takikawa
  • Patent number: 7313094
    Abstract: The invention relates to a node, an optical/electrical path integrated network using this node, and a program which controls the node. The node according to the invention is suited to use in an optical/electrical path integrated network constructed from a plurality of electrical sub-networks comprising nodes which are interconnected by electrical paths in which routing is performed based on packet header information and a photonic core network comprising nodes which are interconnected by optical paths, the photonic core network and the plurality of electrical sub-networks being interconnected by optical paths, wherein the node comprises a device which outputs to other nodes, a traffic quantity between the node to which it belongs and other nodes.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: December 25, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eiji Oki, Kohei Shiomoto, Masaru Katayama, Wataru Imajuku
  • Patent number: 7292576
    Abstract: An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 6, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Seisho Yasukawa, Naoki Takaya, Masayoshi Nabeshima, Eiji Oki, Naoaki Yamanaka
  • Patent number: 7289730
    Abstract: A source node, along with transmitting an optical path setup request, notifies towards a destination node available resource information related to itself, pre-assigns the available resources which its own node has notified. Each of transit nodes, along with relaying towards the destination node the optical path setup request which has been received from a previous hop node, notifies towards the destination node available resource information related to itself, and pre-assigns the available resources which each of their own nodes has notified. The destination node, along with reserving a resource which is to be used for setting up an optical path based upon an optical path setup request which has been received, transmits a resource reservation request towards the source node. The transit nodes and the source node actually reserve an available resource which has been pre-assigned, based upon a resource reservation request from a next hop node.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: October 30, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Nobuaki Matsuura, Naoaki Yamanaka, Wataru Imajuku, Eiji Oki
  • Patent number: 7263289
    Abstract: The present invention relates to a node used in an optical communication network, and comprises functions for transferring and receiving data, and a unit for establishing and releasing a cut through path to a node of the next stage, the establishing and releasing unit having a detecting unit which detects the arrival of a request packet for establishing a cut through path to the node stage.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: August 28, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kohei Shiomoto, Naoaki Yamanaka, Eiji Oki
  • Patent number: 7200330
    Abstract: The present invention relates to a node which is used in the structure of an optical communication network. This node has a signal transmission function for performing data transfer and a signal receiving function for performing data signal reception, and includes a unit for establishing and releasing a cut through path to a next stage node. Moreover, it includes a unit for detecting the arrival of a leading packet of burst data, and the unit for establishing and releasing the cut through path includes a unit for establishing a cut through path to the next stage node, when the arrival of a leading packet of burst data is detected by the leading packet arrival detection unit.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: April 3, 2007
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kohei Shiomoto, Naoaki Yamanaka, Eiji Oki
  • Patent number: 7173931
    Abstract: A multiple phase cell dispatch scheme, in which each phase uses a simple and fair (e.g., round robin) arbitration methods, is described. VOQs of an input module and outgoing links of the input module are matched in a first phase. An outgoing link of an input module is matched with an outgoing link of a central module in a second phase. The arbiters become desynchronized under stable conditions which contributes to the switch's high throughput characteristic. Using this dispatch scheme, a scalable multiple-stage switch able to operate at high throughput, without needing to resort to speeding up the switching fabric and without needing to use buffers in the second stage, is possible. The cost of speed-up and the cell out-of-sequence problems that may occur when buffers are used in the second stage are therefore avoided.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: February 6, 2007
    Inventors: Hung-Hsiang Jonathan Chao, Eiji Oki