Abstract: In a display device manufacturing method including a step of forming a semiconductor film above a substrate and a step of implanting an impurity to each of a first semiconductor film in a first region of the substrate, a second semiconductor film in a second region outside the first region, and a third semiconductor film in a third region outside the first and second regions, the implanting step includes: a first step of forming a first resist above the substrate so as to be thicker in the first region than in the second region, the first resist covering the first and second regions and having an opening in the third region; a second step of implanting an impurity to only the third semiconductor in the third region using the first resist as a mask; a third step of thinning the first resist so as to form a second resist that covers the first region and has an opening in each of second and third regions; a fourth step of implanting an impurity to the second and third semiconductor films in the second and third

Abstract: The present invention obtains a system-in-panel display device using a high-performance thin film transistor by suppressing aggregation of a molten semiconductor at the time of allowing strip-like pseudo-single crystal to grow continuously with a direction control by radiating beams of continuous oscillation laser to a semiconductor film made of silicon while scanning. A display device includes a silicon nitride film formed on the insulation substrate, a silicon oxide film formed on the silicon nitride film, a semiconductor film formed on the silicon oxide film, and a thin film transistor which uses the semiconductor film. Here, the silicon oxide film is constituted of a first silicon oxide film formed using SiH4 and N2O as raw material gases and a second silicon oxide film formed using a TEOS gas as a raw material gas, and the semiconductor film is made of pseudo-single crystal having strip-like grains.

Abstract: The present invention provides a fabrication method of a display device which aims at the reduction of fabricating man-hours.

Abstract: The present invention provides a manufacturing method of a display device which can decrease the lowering of a yield rate of the display device attributed to the aggregations generated by pseudo single crystallization of a silicon film. A manufacturing method of a display device includes a semiconductor film reforming step which reforms a semiconductor film into a second state in which the semiconductor film possesses elongated crystalline particles by radiating a laser beam to the semiconductor film in a first state, an aggregation detecting step which detects the aggregation of the semiconductor film which is generated in the semiconductor film reforming step, and a defect determination step which determines a product as a defective product when a position of the aggregation is present in the inside of the predetermined region and determines the product as a good product when the position of the aggregation is present outside the predetermined region.

Abstract: To obtain a system-in-display with high performance and multifunction at low cost, high performance and reliability of a low temperature polysilicon thin film transistor is devised by terminating traps at a interface between a gate oxide film and a polycrystalline silicon film constituting a channel with fluorine. To maximize its effect, a material not governed by scattering due to potential barriers at grain boundaries, that is, a crystalline thin film approximately in a band shape having fewer grain boundaries that segmentalize the channel is used for the channel portion of the transistor. In this way, it is possible to realize the thin film transistor having both steep transfer characteristic and excellent resistance to hot carriers to unite high performance and reliability, construct various circuits that operate at low power and high speed on the same glass substrate as for pixel portions, and obtain the system-in-display having high performance and multifunction at low cost.

Abstract: A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: The invention provides a method of manufacture of a display device which can achieve a reduction of the manufacturing process. In the manufacturing method, a semiconductor layer is formed over an upper surface of a substrate. An insulation film is formed over an upper surface of the semiconductor layer. Using a mask which covers a first region and exposes a second region, an implantation of impurities into the semiconductor layer is performed in the second region through the insulation film. After the mask is removed, a surface of the insulation film is etched in the first region and the second region to an extent that the insulation film in the second region remains, whereby the film thickness of the insulation film in the second region is set to be smaller than the film thickness of the insulation film in the first region.

Abstract: The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an emitter aperture, and then an epitaxial layer comprised of SiGe is grown selectively in an aperture formed by removing a silicon nitride film so as to form under cut.

Abstract: A bipolar transistor is provided in which both the base resistance and the base-collector capacitance are reduced and which is capable of operating at a high cutoff frequency. The semiconductor device is structured so that the emitter and extrinsic base are separated from each other by an insulator sidewall and the bottom faces of the insulator sidewall, and the emitter are approximately on the same plane. The extrinsic base electrode and the collector region are separated from each other by an insulator.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.

Abstract: A bipolar transistor is provided which is of high reliability and high gain, and which is particularly suitable to high speed operation. The bipolar transistor operates with high accuracy and with no substantial change of collector current even upon change of collector voltage. It also has less variation than conventional bipolar transistors for the collector current while ensuring high speed properties and high gain. In one example, the band gap in the base region is smaller than the band gap in the emitter and collector regions. The band gap is constant near the junction with the emitter region and decreases toward the junction with the collector region. A single crystal silicon/germanium is a typically used for the base region.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: Provided is a BiCOMOS semiconductor integrated circuit device which comprises a semiconductor substrate having an insulating layer internally and partially embedded therein and a semiconductor layer deposited on the insulating layer, an insulated gate type transistor formed in the semiconductor layer, a highly-doped collector layer of a bipolar transistor embedded in an insulating-layer-free portion of the semiconductor substrate, and a low-doped collector layer disposed on the highly-doped collector layer of the bipolar transistor, wherein the height level of the lower portion of the low-doped collector layer is below the height level of the lower portion of the insulating layer so as to attain high breakdown voltage and high speed operation of the bipolar transistor.

Abstract: The invention provides a bipolar transistor with improved performance. An insulation film comprising a silicon oxide film is formed by means of oxidation treatment on the side surface of an emitter aperture, and then an epitaxial layer comprised of SiGe is grown selectively in an aperture formed by removing a silicon nitride film so as to form under cut.

Abstract: A high-speed bipolar transistor is provided which is improved in the effect of heat radiation without increasing the substrate capacitance. The heat radiation connection between a base region and a silicon substrate includes a p+ extrinsic base polysilicon electrode and a polysilicon layer buried in an isolation groove with a very thin silicon dioxide side wall. Accordingly, the heat generated at the base is radiated through this path to the silicon substrate. Further, the film thickness of the silicon dioxide on the inner wall of the isolation groove is sufficiently increased compared with previous structures to prevent an increase in the substrate capacitance. Consequently, there can be obtained a bipolar transistor which operates at high speed, and is improved in the effect of heat radiation without increasing the substrate capacitance.