Patents by Inventor Eiji Sakagami

Eiji Sakagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8789508
    Abstract: In order to provide a small air-intake apparatus for an internal combustion engine, which can satisfactorily control an air flow and can reduce energy loss in a rotary valve, the air-intake apparatus includes a surge tank; a first air-intake passage communicating with the surge tank; a second air-intake passage communicating with the surge tank; a casing including a first port connected to the first air-intake passage, a second port connected to the second air-intake passage, and an outlet port connected to an air-intake portion of the internal combustion engine; a rotary valve including a rotor housed in a valve casing portion of the casing to be rotatable about a rotational axis, the rotary valve being configured to control air intake directed to the air-intake portion by rotation of the rotor; and a first seal for sealing between the rotor and a surface of the valve casing portion facing the rotor with at least either one of the first port, second port and outlet port being closed.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: July 29, 2014
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventor: Eiji Sakagami
  • Patent number: 8479699
    Abstract: An intake apparatus for an internal combustion engine comprises an intake manifold (1) with air feeding passages (3) adapted to be connected to and feed air to cylinders of an engine; a rotary valve (10) including a plurality of valve portions (11) in communication with the air feeding passages (3) through feed switch openings (7); a sealing member (60) fitted to the valve portion, the sealing member including ring portions (61) and interconnecting portions interconnecting the ring portions, recessed portions (76) defined on an outer side of the valve portions for receiving engaging portions (64) on inner sides of the interconnecting portions of the sealing members, wherein when the rotary valve is in the closed position, a first sealing gap (A) between the engaging portion and an inner face (77) of the recessed portion is set smaller than a valve gap (C) between the valve portion and the bore portion (8).
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: July 9, 2013
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Atsushi Ito, Eiji Sakagami
  • Publication number: 20120025295
    Abstract: A semiconductor memory device includes first and second element isolation insulating films, first and second gate insulating films, first and second gate wiring and first and second mask layer. First and second upper surfaces of the first and second element isolation insulating films are higher than an upper surface of the substrate, first and second bottom surfaces of the first and second element isolation insulating films are lower than the upper surface of the substrate, a second height from the upper surface of the substrate to the second upper surface is larger than a first height from the upper surface of the substrate to the first upper surface. A height from the upper surface of the substrate to an upper surface of the first mask layer equals a height from the upper surface of the substrate to an upper surface of the second mask layer.
    Type: Application
    Filed: October 6, 2011
    Publication date: February 2, 2012
    Inventor: Eiji SAKAGAMI
  • Publication number: 20120000438
    Abstract: In order to provide a small air-intake apparatus for an internal combustion engine, which can satisfactorily control an air flow and can reduce energy loss in a rotary valve, the air-intake apparatus includes a surge tank; a first air-intake passage communicating with the surge tank; a second air-intake passage communicating with the surge tank; a casing including a first port connected to the first air-intake passage, a second port connected to the second air-intake passage, and an outlet port connected to an air-intake portion of the internal combustion engine; a rotary valve including a rotor housed in a valve casing portion of the casing to be rotatable about a rotational axis, the rotary valve being configured to control air intake directed to the air-intake portion by rotation of the rotor; and a first seal for sealing between the rotor and a surface of the valve casing portion facing the rotor with at least either one of the first port, second port and outlet port being closed.
    Type: Application
    Filed: March 2, 2010
    Publication date: January 5, 2012
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventor: Eiji Sakagami
  • Patent number: 8043930
    Abstract: A semiconductor memory device includes first and second element isolation insulating films, first and second gate insulating films, first and second gate wiring and first and second mask layer. First and second upper surfaces of the first and second element isolation insulating films are higher than an upper surface of the substrate, first and second bottom surfaces of the first and second element isolation insulating films are lower than the upper surface of the substrate, a second height from the upper surface of the substrate to the second upper surface is larger than a first height from the upper surface of the substrate to the first upper surface. A height from the upper surface of the substrate to an upper surface of the first mask layer equals a height from the upper surface of the substrate to an upper surface of the second mask layer.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: October 25, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Eiji Sakagami
  • Publication number: 20110114051
    Abstract: An air intake apparatus for an internal combustion engine includes a casing having a hollow shape and constituting an air intake passage connected to a cylinder of an internal combustion engine, the casing including an intake port and a discharge port, and a rotary valve mounted at an inside of the casing in a rotatably driven manner and including a rotor that adjusts a volume of an airflow from the intake port to the discharge port of the casing. The rotor includes a valve element edge portion that varies an opening area of the discharge port, the valve element edge portion being formed by a cut portion.
    Type: Application
    Filed: November 5, 2010
    Publication date: May 19, 2011
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Hiroaki KUMAGAI, Eiji Sakagami
  • Publication number: 20110114052
    Abstract: An air intake apparatus for an internal combustion engine includes a casing including an intake port and a discharge port, a rotary valve rotatable around a rotational axis within the casing and including a valve element that controls a connecting state between the intake port and the discharge port, and an inner surface forming portion formed at an inner surface of the casing along the rotational axis of the rotary valve and defined from the intake port to the discharge port, a distance of the inner surface from the rotational axis being shorter than a maximum rotational radius of the valve element.
    Type: Application
    Filed: November 5, 2010
    Publication date: May 19, 2011
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventor: Eiji Sakagami
  • Patent number: 7928494
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a plurality of floating gate electrodes formed in a memory cell forming region of the semiconductor substrate, a word line electrically connecting the floating gate electrodes and a conductor portion formed on the word line so as to reduce a resistance of the word line.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: April 19, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Sakagami, Makoto Nakashima
  • Patent number: 7819104
    Abstract: An intake apparatus for an internal combustion engine comprises an intake manifold (1); a rotary valve (10) including a plurality of valve portions (11) in communication with air feeding passages (3) through feed switch openings (7); a sealing member (60) fitted to the valve portion, the sealing member including ring portions (61) and interconnecting portions interconnecting the ring portions, recessed portions (76) defined on an outer side of the valve portions for receiving engaging portions (64) on inner sides of the interconnecting portions of the sealing members, wherein a distance (D1a) from a central portion of an outer peripheral edge (20a) of the closed area portion (20) to the rotational axis (P) is set smaller than a distance (D2) from a second central portion (43) of an outer peripheral edge (40a) of the open area portion (40) to the rotational axis.
    Type: Grant
    Filed: July 17, 2007
    Date of Patent: October 26, 2010
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Atsushi Ito, Eiji Sakagami
  • Patent number: 7763929
    Abstract: A nonvolatile semiconductor memory device includes floating gates, source areas, drain areas, word lines, diffusion layers, source lines and shield wires. The source area is shared by the floating gates adjacent to each other in a column direction. The drain area faces the source area in the column direction with the floating gate. The drain area is wider than the source area in the column direction. The diffusion layer is formed on an inner wall of a trench made between the source areas adjacent to each other in the same row direction and electrically connects the adjacent source areas together. The source line is formed of the source area and diffusion layer on the same row. The shield wire is disposed on and along the source line. A top surface of the shield wire is lower than that of the floating gate adjacent to the shield wire.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: July 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Eiji Sakagami
  • Patent number: 7709347
    Abstract: A method of fabricating a semiconductor device, including: forming a first well of a second conduction type and a second well of a first conduction type on a semiconductor substrate of the first conduction type, forming a gate oxide corresponding to each element on a surface of the semiconductor substrate, forming trenches by etching at forming locations of first and second trench isolating regions respectively at a first depth larger than a depth of a diffusion layer formed in a memory-cell forming region within the second well and smaller than a depth of a diffusion layer of a transistor of a peripheral circuit region, executing additional etching at a forming location of the second trench isolating region so that a second depth larger than the first depth is obtained and doping the trenches at the forming locations of the first and second trench isolating regions respectively, with a doping agent, thereby executing a planarization process.
    Type: Grant
    Filed: April 8, 2009
    Date of Patent: May 4, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Eiji Sakagami
  • Publication number: 20100083929
    Abstract: An intake system for an internal combustion engine, includes a rotary valve including a casing provided with a first port, a second port and an outlet port, and a rotatable valve member accommodated in the casing and rotated by an actuator, a first intake passage fluidically connecting a surge tank and the first port, a second intake passage fluidically connecting the surge tank and the second port and a third intake passage fluidically connecting a cylinder and the outlet port, wherein a first state where the outlet port is throttled and at least one of the first port and the second port is opened, or a second state where the outlet port, and at least one of the first port and the second port are opened, is selectively established.
    Type: Application
    Filed: September 28, 2009
    Publication date: April 8, 2010
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Eiji Sakagami, Tomohisa Senda
  • Publication number: 20100019305
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a plurality of floating gate electrodes formed in a memory cell forming region of the semiconductor substrate, a word line electrically connecting the floating gate electrodes and a conductor portion formed on the word line so as to reduce a resistance of the word line.
    Type: Application
    Filed: September 30, 2009
    Publication date: January 28, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Eiji Sakagami, Makoto Nakashima
  • Publication number: 20090288629
    Abstract: An intake apparatus for an internal combustion engine comprises an intake manifold (1) with air feeding passages (3) adapted to be connected to and feed air to cylinders of an engine; a rotary valve (10) including a plurality of valve portions (11) in communication with the air feeding passages (3) through feed switch openings (7); a sealing member (60) fitted to the valve portion, the sealing member including ring portions (61) and interconnecting portions interconnecting the ring portions, recessed portions (76) defined on an outer side of the valve portions for receiving engaging portions (64) on inner sides of the interconnecting portions of the sealing members, wherein when the rotary valve is in the closed position, a first sealing gap (A) between the engaging portion and an inner face (77) of the recessed portion is set smaller than a valve gap (C) between the valve portion and the bore portion (8).
    Type: Application
    Filed: July 17, 2007
    Publication date: November 26, 2009
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Atsushi Ito, Eiji Sakagami
  • Publication number: 20090283065
    Abstract: An intake apparatus for an internal combustion engine comprises an intake manifold (1); a rotary valve (10) including a plurality of valve portions (11) in communication with air feeding passages (3) through feed switch openings (7); a sealing member (60) fitted to the valve portion, the sealing member including ring portions (61) and interconnecting portions interconnecting the ring portions, recessed portions (76) defined on an outer side of the valve portions for receiving engaging portions (64) on inner sides of the interconnecting portions of the sealing members, wherein a distance (D1a) from a central portion of an outer peripheral edge (20a) of the closed area portion (20) to the rotational axis (P) is set smaller than a distance (D2) from a second central portion (43) of an outer peripheral edge (40a) of the open area portion (40) to the rotational axis.
    Type: Application
    Filed: July 17, 2007
    Publication date: November 19, 2009
    Applicant: Aisin Seiki Kabushiki Kaisha
    Inventors: Atsushi Ito, Eiji Sakagami
  • Patent number: 7615818
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a plurality of floating gate electrodes formed in a memory cell forming region of the semiconductor substrate, a word line electrically connecting the floating gate electrodes and a conductor portion formed on the word line so as to reduce a resistance of the word line.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: November 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Sakagami, Makoto Nakashima
  • Publication number: 20090203186
    Abstract: A method of fabricating a semiconductor device, including: forming a first well of a second conduction type and a second well of a first conduction type on a semiconductor substrate of the first conduction type, forming a gate oxide corresponding to each element on a surface of the semiconductor substrate, forming trenches by etching at forming locations of first and second trench isolating regions respectively at a first depth larger than a depth of a diffusion layer formed in a memory-cell forming region within the second well and smaller than a depth of a diffusion layer of a transistor of a peripheral circuit region, executing additional etching at a forming location of the second trench isolating region so that a second depth larger than the first depth is obtained and doping the trenches at the forming locations of the first and second trench isolating regions respectively, with a doping agent, thereby executing a planarization process.
    Type: Application
    Filed: April 8, 2009
    Publication date: August 13, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Eiji Sakagami
  • Patent number: 7557401
    Abstract: A semiconductor device includes an element isolation insulating film adjacent to an active area, a gate insulating film formed on a semiconductor substrate in the active area, paired gate electrodes located on the gate insulating film, a contact plug located on the active area between the gate electrodes, a pair of first upper lines located on the gate electrodes, a second upper line located on the gate electrodes, and a stopper film above upper surfaces of the gate electrodes and side surfaces of the gate electrodes. The element isolation insulating film has a first height of an upper surface thereof with reference to an upper surface of the semiconductor substrate and a second height of another upper surface thereof with reference to another upper surface of the semiconductor substrate. The first height is smaller than the second height.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: July 7, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keisuke Yonehama, Seiichi Mori, Eiji Sakagami, Masahisa Sonoda
  • Publication number: 20090130809
    Abstract: A semiconductor memory device includes first and second element isolation insulating films, first and second gate insulating films, first and second gate wiring and first and second mask layer. First and second upper surfaces of the first and second element isolation insulating films are higher than an upper surface of the substrate, first and second bottom surfaces of the first and second element isolation insulating films are lower than the upper surface of the substrate, a second height from the upper surface of the substrate to the second upper surface is larger than a first height from the upper surface of the substrate to the first upper surface. A height from the upper surface of the substrate to an upper surface of the first mask layer equals a height from the upper surface of the substrate to an upper surface of the second mask layer.
    Type: Application
    Filed: January 16, 2009
    Publication date: May 21, 2009
    Inventor: Eiji SAKAGAMI
  • Patent number: 7368342
    Abstract: A method for manufacturing a semiconductor device includes forming a gate-insulating film on a semiconductor substrate; forming a gate electrode on the gate-insulating film to be electrically insulated from the semiconductor substrate; etching the gate electrode, the gate insulating film and the semiconductor substrate to form a trench which is used to electrically isolate a device region for forming a device from the remainder region on the substrate top surface; and etching the inside of the trench using a gas containing Cl2 and HBr with a different condition from the etching condition of the semiconductor substrate.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahisa Sonoda, Hiroaki Tsunoda, Eiji Sakagami, Hidemi Kanetaka, Kenji Matsuzaki, Takanori Matsumoto