Abstract: A semiconductor device includes a substrate, a semiconductor layer, an element region, and fin transistors. The substrate includes a principal surface. The semiconductor layer is formed as a surface layer or on the principal surface of the substrate, the surface layer being the principal surface of the substrate. The semiconductor layer has a crystal structure in which an angle between two of crystal orientations with equivalent relationships on a crystal plane having a correspondence with the principal surface of the substrate is 60 degrees or 120 degrees. The element region includes unit element regions formed on the principal surface of the substrate. The fin transistors are formed in the semiconductor layer, in the respective unit element regions. The fin transistors radially extend from a center toward an outer periphery of the element region. Adjacent two of the fin transistors have a spacing with a 60° angle or a 120° angle.

Abstract: The present invention relates to a method for manufacturing a semiconductor substrate, including: (a) preparing an epitaxial substrate having a nitride semiconductor layer formed on a first main surface of a growth substrate and preparing a first support substrate, forming a resin adhesive layer between the first main surface of the growth substrate and a first main surface of the first support substrate, and bonding the epitaxial substrate to the first support substrate; (b) thinning a second main surface of the growth substrate; (c) forming a first protective thin film layer on the thinned growth substrate; (d) forming a second protective thin film layer on the first support substrate; (e) removing the thinned growth substrate; (f) bonding a second support substrate onto the nitride semiconductor layer; and (g) removing the first support substrate and the resin adhesive layer.

Abstract: An object is to provide a technique capable of suppressing defectives in semiconductor elements. A manufacturing method of a semiconductor device includes a step of forming a laminated body in which an adhesive protective layer, an adhesive layer, a peeling layer, and a support substrate are disposed in this order on a first main surface of the semiconductor substrate, a step of removing the semiconductor substrate other than a portion where a plurality of circuit elements are formed, a step of bonding the portion where the circuit elements are formed to a transfer substrate, a step of removing the peeling layer, the support substrate and the adhesive layer, a step of removing the adhesive protective layer by chemical treatment, and a step of dividing the plurality of circuit elements.

Abstract: A source layer is provided on a first p-type layer made of a nitride-based semiconductor, and includes a semiconductor region including electrons as carriers. A drain layer faces the source layer in a first direction on the first p-type layer with a gap being provided therebetween, and includes a semiconductor region including electrons as carriers. A channel structure is provided between the source layer and the drain layer on the first p-type layer, in which a channel region and a gate region are alternately disposed in a second direction perpendicular to the first direction. A channel layer included in the channel structure forms at least a part of the channel region, and is made of a nitride-based semiconductor. A gate layer included in the channel structure forms at least a part of the gate region, and electrically connects a gate electrode and the first p-type layer.

Abstract: A provided is a polycrystalline diamond substrate that can reduce the cost for inhibiting warpage. The polycrystalline diamond substrate is a polycrystalline diamond substrate having a first principal surface and a second principal surface, and includes, between the first principal surface and the second principal surface, a surface having an average grain diameter smaller than each of average grain diameters of the first principal surface and the second principal surface.

Abstract: A split in a dicing street in a semiconductor film is prevented. A semiconductor device includes: a first dicing street passing between a plurality of element regions on which a plurality of protective films are formed one-to-one, the first dicing street extending along a first axis; a second dicing street passing between the plurality of element regions and extending along a second axis; and a stop island disposed on the upper surface of the semiconductor film at an intersection between the first dicing street and the second dicing street, the stop island being in non-contact with the plurality of element regions. X_si>X_ds and Y_si<Y_ds are satisfied.

Abstract: An object is to provide a technique that ensures to reduce a parasitic resistance of a semiconductor device while enhancing a breakdown voltage property of a semiconductor device. A portion of a second semiconductor layer exposed from a first semiconductor layer corresponds to a concave portion of a laminated structure and the first semiconductor layer or an adjacent portion of the first semiconductor layer and a second semiconductor layer corresponds to a convex portion of the laminated structure. A first guard ring of a second conductivity type is arranged on side walls of the convex portion, and in the concave portion, a guard ring of the second conductivity type is not arranged, or a second guard ring of the second conductivity type having a thickness thinner than that of the first guard ring is arranged.

Abstract: A semiconductor device includes a first substrate, a semiconductor layer consisting of a nitride-based compound semiconductor, and a bonding layer bonded to the first substrate and the semiconductor layer between the first substrate and the semiconductor layer, and containing at least one of constituent elements of the nitride-based compound semiconductor.

Abstract: A first nitride semiconductor layer and a second nitride semiconductor layer are laminated in a first direction. The first and second nitride semiconductor layers form a heterojunction, and a two-dimensional carrier gas is induced in the first nitride semiconductor layer. A drain electrode is opposite to a source electrode via gate electrode in a third direction. The source electrode and the drain electrode conduct with the first nitride semiconductor layer. The first and second nitride semiconductor layers form a Schottky junction with the gate electrode. A first layer is located between the gate electrode and the drain electrode in the third direction and is in contact with the gate electrode, and is in contact with the second nitride semiconductor layer in a second direction. The first layer suppresses induction of the two-dimensional carrier gas in the first nitride semiconductor layer opposite to the first layer in the first direction.

Abstract: It is an object of the present disclosure to provide a method of manufacturing a thin semiconductor element having a low defect rate. A method of manufacturing a semiconductor element according to the present disclosure includes: forming a metal thin film on an electrode protection layer of a circuit element substrate and a support substrate in vacuum; attaching the metal thin film of the circuit element substrate and the metal thin film of the support substrate by an atomic diffusion joining method; removing a semiconductor substrate by polishing to expose a circuit element; joining a transfer substrate to an exposed surface of the circuit element; and detaching the support substrate from the circuit element after joining the transfer substrate.

Abstract: The present disclosure relates to a semiconductor substrate manufacturing method including: forming a catalytic metal film composed of a transition metal on a main surface to be polished of a workpiece substrate composed of any one of diamond, silicon carbide, gallium nitride, and sapphire; and providing relative movement between the workpiece substrate on which the catalytic metal film has been formed and a polishing platen in an oxidant solution to remove a compound generated by chemical reaction of an active radical generated by reaction of the catalytic metal film and the oxidant solution and a surface atom on the main surface of the workpiece substrate to thereby polish the workpiece substrate. The manufacturing method further includes: bonding the polished workpiece substrate to a nitride semiconductor layer by room temperature bonding; and removing a support substrate and a resin adhesive layer.

Abstract: A nitride semiconductor device includes: a diamond substrate; a first graphene layer provided on the diamond substrate; a second graphene layer provided on the first graphene layer; a nitride semiconductor layer provided on the second graphene layer; and a nitride semiconductor element having an electrode provided on the nitride semiconductor layer, wherein the first and second graphene layers are provided as an interface layer between the diamond substrate and the nitride semiconductor layer.

Abstract: A semiconductor device includes a nitride semiconductor laminated structure formed on a substrate, a source electrode formed on the nitride semiconductor laminated structure, a drain electrode and a gate electrode, and a surface protection film covering the nitride semiconductor laminated structure. the nitride semiconductor laminated structure includes: a first nitride semiconductor layer formed on the substrate; and a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a composition different from the first nitride semiconductor layer. The surface protection film includes: a first insulating film formed to have contact with the gate electrode; and a second insulating film formed adjacent to the first insulating film and having a higher carbon concentration than the first insulating film.

Abstract: A semiconductor device includes a diamond substrate made of diamond, and a nitride semiconductor layer formed in a recess formed at an upper surface of the diamond substrate. The semiconductor device further includes at least one of: (A) the nitride semiconductor layer formed to be surrounded entirely by the upper surface of the diamond substrate in a plan view; (B) the diamond substrate in which the upper surface of the diamond substrate and an upper surface of the nitride semiconductor layer are located on the same plane; and (C) the diamond substrate having electrical insulating properties.

Abstract: Removal of substrates in a composite substrate is facilitated, and flaking of the composite substrate in an unintended process is prevented. A method for manufacturing a composite substrate includes: forming a first bonding material in a first surface of a first substrate; forming, in the first surface, at least one groove located more inward than a periphery in a plan view of the first substrate; forming the first bonding material along an inner wall of the at least one groove, the first bonding material not filling into space enclosed by the inner wall of the at least one groove; forming a second bonding material on a second surface of a second substrate; and bonding the first bonding material and the second bonding material together in a region except the at least one groove.

Abstract: The present invention relates to a method for manufacturing a semiconductor substrate, including: (a) preparing an epitaxial substrate having a nitride semiconductor layer formed on a first main surface of a growth substrate and preparing a first support substrate, forming a resin adhesive layer between the first main surface of the growth substrate and a first main surface of the first support substrate, and bonding the epitaxial substrate to the first support substrate; (b) thinning a second main surface of the growth substrate; (c) forming a first protective thin film layer on the thinned growth substrate; (d) forming a second protective thin film layer on the first support substrate; (e) removing the thinned growth substrate; (0 bonding a second support substrate onto the nitride semiconductor layer; and (g) removing the first support substrate and the resin adhesive layer.

Abstract: It is an object of the present invention to provide a semiconductor device having high heat dissipation performance. A semiconductor device includes: a diamond substrate having a recess in an upper surface thereof; a nitride semiconductor layer disposed within the recess in the upper surface of the diamond substrate; and an electrode disposed on the nitride semiconductor layer, wherein the nitride semiconductor layer and the electrode constitute a field-effect transistor, the diamond substrate has a source via hole extending through a thickness of the diamond substrate to expose the source electrode, and the semiconductor device further includes a via metal covering an inner wall of the source via hole and a lower surface of the diamond substrate.

Abstract: Provided is a technique capable of suppressing a short channel effect occurring in accordance with miniaturization. A semiconductor device includes: a second nitride semiconductor layer on an upper surface of a first nitride semiconductor layer; a source electrode and a drain electrode on part of an upper surface of the second nitride semiconductor layer; and a gate electrode on a lower surface of the first nitride semiconductor layer between the source electrode and the drain electrode in a plan view, wherein the second nitride semiconductor layer has a larger bandgap than the first nitride semiconductor layer, and the drain electrode is separated from the source electrode.

Abstract: An object is to provide a technique capable of suppressing defectives in semiconductor elements. A manufacturing method of a semiconductor device includes a step of forming a laminated body in which an adhesive protective layer, an adhesive layer, a peeling layer, and a support substrate are disposed in this order on a first main surface of the semiconductor substrate, a step of removing the semiconductor substrate other than a portion where a plurality of circuit elements are formed, a step of bonding the portion where the circuit elements are formed to a transfer substrate, a step of removing the peeling layer, the support substrate and the adhesive layer, a step of removing the adhesive protective layer by chemical treatment, and a step of dividing the plurality of circuit elements.

Abstract: The semiconductor manufacturing device includes: a lower substrate support base configured to support a diamond substrate; an upper substrate support base configured to support a semiconductor substrate; a support base drive unit configured to move the lower substrate support base and the upper substrate support base to bring the diamond substrate and the semiconductor substrate into close contact with each other under a state in which a pressure is applied to the diamond substrate and the semiconductor substrate in a thickness direction; and a second mechanism configured to deform a surface of the upper substrate support base opposed to the lower substrate support base so that a surface of the semiconductor substrate opposed to the diamond substrate forms a parallel surface or a parallel plane with respect to a surface of the diamond substrate opposed to the semiconductor substrate.