Patents by Inventor Eiji Yoneda
Eiji Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240142876Abstract: A method for manufacturing a semiconductor substrate, includes: directly or indirectly applying a composition for forming a resist underlayer film to a substrate to form a resist under film directly or indirectly on the substrate; applying a composition for forming a resist film to the resist underlayer film to form a resist film on the resist underlayer film; exposing the resist film to radiation; and developing the exposed resist film by a developer. The composition for forming a resist underlayer film includes: a polymer; an onium salt that is capable of generating at least one polar group selected from the group consisting of a carboxy group and a hydroxy group by radiation or heat; and a solvent.Type: ApplicationFiled: December 5, 2023Publication date: May 2, 2024Applicant: JSR CORPORATIONInventors: Hiroyuki MIYAUCHI, Satoshi DEI, Ryotaro TANAKA, Eiji YONEDA, Sho YOSHINAKA
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Publication number: 20240105451Abstract: A method for manufacturing a semiconductor substrate, includes: directly or indirectly applying a composition for forming a resist underlayer film to a substrate to form a resist underlayer film; applying a composition for forming a resist film to the resist underlayer film to form a resist film; exposing the resist film to radiation; and developing the exposed resist film. The composition for forming a resist underlayer film includes: a polymer; an acid generating agent; and a solvent. The resist underlayer film has a film thickness of 6 nm or less.Type: ApplicationFiled: November 15, 2023Publication date: March 28, 2024Applicant: JSR CORPORATIONInventors: Eiji YONEDA, Takayoshi ABE, Hiroyuki MIYAUCHI
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Publication number: 20190002717Abstract: The ink contains: an ink agent containing a polymer having a chromophore; and a binder resin. The ink preferably further contains water, an antiseptic agent, and/or a hydrotropic agent. The polymer is preferably in a particulate form. The textile printing method includes discharging droplets of the ink to attach the droplets onto a woven fabric and heating the woven fabric obtained after the discharging. The printed textile of the present invention is obtained by the aforementioned textile printing method. The ink agent for textile of the present invention contains a polymer having a chromophore.Type: ApplicationFiled: September 6, 2018Publication date: January 3, 2019Applicant: JSR CORPORATIONInventors: Eiji YONEDA, Hiroshi KAWAI, Keisuke TSUKIMAWASHI, Masahumi WAKAMORI, Motohisa AZECHI
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Patent number: 10068915Abstract: According to one embodiment, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate and openings different in depth surrounded by the stacked body and separated from each other.Type: GrantFiled: December 12, 2016Date of Patent: September 4, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Nagai, Eiji Yoneda, Kentaro Matsunaga, Koutarou Sho
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Publication number: 20170092656Abstract: According to one embodiment, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate and openings different in depth surrounded by the stacked body and separated from each other.Type: ApplicationFiled: December 12, 2016Publication date: March 30, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGAI, Eiji Yoneda, Kentaro Matsunaga, Koutarou Sho
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Publication number: 20170052460Abstract: According to one embodiment, a mask container includes a case that houses a pattern transfer mask, and a heater. The case supports the pattern transfer mask inside the case. The heater heats the case so that the pattern transfer mask in the case has a predetermined temperature.Type: ApplicationFiled: October 29, 2015Publication date: February 23, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Eiji YONEDA, Masaru Suzuki, Hiroyuki Mizuno, Satoshi Nagai, Munetaka Machida
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Patent number: 9465295Abstract: According to one embodiment, first a guide pattern is formed above an object to processing, and then surface modification is performed on the guide pattern. Then a solution including a block copolymer is coated over the object to processing having the guide pattern formed thereon, and the block copolymer is made to phase separate over the object to processing. Subsequently, one component of the phase-separated block copolymer is removed by development. And with the guide pattern coated with other component of the block copolymer as a mask, the object to processing is patterned.Type: GrantFiled: February 28, 2014Date of Patent: October 11, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Kentaro Matsunaga, Masashi Terao, Eiji Yoneda
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Publication number: 20160260731Abstract: According to one embodiment, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate and openings different in depth surrounded by the stacked body and separated from each other.Type: ApplicationFiled: June 24, 2015Publication date: September 8, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGAI, Eiji YONEDA, Kentaro MATSUNAGA, Koutarou SHO
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Patent number: 9348226Abstract: A radiation-sensitive resin composition comprising an acid-labile group-containing resin obtained by living radical polymerization having a specific structure which is insoluble or scarcely soluble in alkali, but becomes alkali soluble by the action of an acid, and a photoacid generator, wherein the ratio of weight average molecular weight to number average molecular weight (weight average molecular weight/number average molecular weight) of the acid-labile group-containing resin is smaller than 1.5.Type: GrantFiled: December 24, 2003Date of Patent: May 24, 2016Assignee: JSR CORPORATIONInventors: Isao Nishimura, Kouichi Fujiwara, Eiichi Kobayashi, Tsutomu Shimokawa, Atsushi Nakamura, Eiji Yoneda, Yong Wang
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Patent number: 9349585Abstract: According to an embodiment, a guide pattern having a first opening pattern and a second opening pattern shallower than the first opening pattern, is formed on a film to be processed. A directed self-assembly material is set into the first and second opening patterns. The directed self-assembly material is phase-separated into first and second phases in the first and second opening patterns. A third opening pattern is formed by removing the first phase. The third opening pattern in the second opening pattern is eliminated, and the second and third opening patterns are transferred to the film to be processed, by one etching to be processed from the tops of the second and third opening patterns.Type: GrantFiled: December 19, 2014Date of Patent: May 24, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Sonoe Nakaoka, Kentaro Matsunaga, Eiji Yoneda
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Publication number: 20160064216Abstract: According to an embodiment, a guide pattern having a first opening pattern and a second opening pattern shallower than the first opening pattern, is formed on a film to be processed. A directed self-assembly material is set into the first and second opening patterns. The directed self-assembly material is phase-separated into first and second phases in the first and second opening patterns. A third opening pattern is formed by removing the first phase. The third opening pattern in the second opening pattern is eliminated, and the second and third opening patterns are transferred to the film to be processed, by one etching to be processed from the tops of the second and third opening patterns.Type: ApplicationFiled: December 19, 2014Publication date: March 3, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Sonoe NAKAOKA, Kentaro Matsunaga, Eiji Yoneda
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Patent number: 9260300Abstract: According one embodiment, a pattern formation method forming a resist layer on a pattern formation surface by pressing a template provided with a concave-convex from above the resist layer to form a resist pattern on the pattern formation surface, includes: forming a resist layer in a first region having an area smaller than an area of the pattern formation surface and in a second region other than the first region of the pattern formation surface; pressing a template against the resist layer; irradiating the resist layer with light via the template to form a first resist layer in the first region, curing of the first resist layer being suppressed, and form the resist pattern including a second resist layer, curing of the second resist layer proceeds in the second region; and removing the first resist layer from the first region, the curing of the first resist layer being suppressed.Type: GrantFiled: July 30, 2013Date of Patent: February 16, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Kentaro Matsunaga, Nobuhiro Komine, Eiji Yoneda
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Patent number: 9209052Abstract: A semiconductor manufacturing apparatus according to the present embodiment includes a vacuum chamber. A stage mounts a semiconductor substrate thereon within the vacuum chamber. An electrostatic chuck fixes the semiconductor substrate onto the stage. A sensor detects a height of a surface of the semiconductor substrate fixed onto the stage by the electrostatic chuck. A processor determines whether the surface of the semiconductor substrate is distorted based on the height of the surface of the semiconductor substrate. The processor calculates correction values for a pattern transferred onto the surface of the semiconductor substrate by exposure based on the height of the surface of the semiconductor substrate when the surface of the semiconductor substrate is distorted. An exposure part exposes the surface of the semiconductor substrate to light using the correction values.Type: GrantFiled: August 12, 2013Date of Patent: December 8, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yumi Nakajima, Kentaro Matsunaga, Eiji Yoneda
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Publication number: 20150253674Abstract: According to one embodiment, a resist film formed on a processing layer is exposed by irradiating exposure light with a first wavelength belonging to an EUV band and auxiliary light with a second wavelength different from the first wavelength, the auxiliary light being separately generated from the exposure light.Type: ApplicationFiled: June 23, 2014Publication date: September 10, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGAI, Eiji YONEDA
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Publication number: 20150168841Abstract: According to one embodiment, first a guide pattern is formed above an object to processing, and then surface modification is performed on the guide pattern. Then a solution including a block copolymer is coated over the object to processing having the guide pattern formed thereon, and the block copolymer is made to phase separate over the object to processing. Subsequently, one component of the phase-separated block copolymer is removed by development. And with the guide pattern coated with other component of the block copolymer as a mask, the object to processing is patterned.Type: ApplicationFiled: February 28, 2014Publication date: June 18, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Kentaro MATSUNAGA, Masashi Terao, Eiji Yoneda
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Publication number: 20150116687Abstract: According to one embodiment, a microprocessing system for transferring a concave-convex pattern of a template to a resist layer formed on a substrate by bringing the template with concave-convex formed close or pressing the template against the resist layer, the microprocessing system includes a microprocessing apparatus, and a control device. The microprocessing apparatus includes a stage unit capable of supporting the substrate, a chuck unit opposing the stage unit and capable of bringing the template close or pressing the template against the resist layer, a memory unit capable of storing a relationship between a pressing force of the template and a film thickness of the resist layer, and a control unit configured to control bringing close or pressing of the template to the resist layer. The control device corrects the relationship so that the film thickness distribution falls within a target distribution.Type: ApplicationFiled: May 23, 2014Publication date: April 30, 2015Applicant: Kabushiki Kaisha ToshibaInventor: Eiji YONEDA
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Publication number: 20140285787Abstract: According to one embodiment, an exposure system includes: a supporting stage; a plurality of masks provided on an upper side of the supporting stage; and a light source being capable of irradiating a substrate with light through the plurality of masks, the plurality of masks including: a first mask, and a light shielding film being patterned in the first mask; and a second mask provided on an upper side or a lower side of the first mask, the second mask including a second region facing a first region of the first mask, the light shielding film not being present in the first region, and a light shielding film not being patterned in the second region or the light shielding film being patterned in at least a part of the second region, and a plurality of laser-irradiated marks being provided in at least the second region of the second mask.Type: ApplicationFiled: August 29, 2013Publication date: September 25, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Eiji YONEDA, Nobuhiro Komine, Satomi Higashibata, Kazutaka Ishigo, Yosuke Okamoto
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Publication number: 20140251393Abstract: According to one embodiment, an application liquid application apparatus includes: a support stage having a rotation mechanism; and an application liquid discharge module configured to discharge an application liquid onto a surface of a substrate mounted on the support stage along on a rotation axis of the support stage. The application liquid discharge module including: a nozzle configured to discharge the application liquid toward the surface of the substrate; at least one application liquid supply line configured to supply the application liquid to the nozzle; a valve control unit; and a valve control data memory unit. The application liquid supply line including: a supply tube configured to supply the application liquid to the nozzle; and a maximum flow rate adjustment module configured to adjust a maximum flow rate of the application liquid in the supply tube; a first valve; and at least one second valve.Type: ApplicationFiled: August 21, 2013Publication date: September 11, 2014Applicant: Kabushiki Kaisha ToshibaInventor: Eiji YONEDA
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Publication number: 20140227807Abstract: A semiconductor manufacturing apparatus according to the present embodiment includes a vacuum chamber. A stage mounts a semiconductor substrate thereon within the vacuum chamber. An electrostatic chuck fixes the semiconductor substrate onto the stage. A sensor detects a height of a surface of the semiconductor substrate fixed onto the stage by the electrostatic chuck. A processor determines whether the surface of the semiconductor substrate is distorted based on the height of the surface of the semiconductor substrate. The processor calculates correction values for a pattern transferred onto the surface of the semiconductor substrate by exposure based on the height of the surface of the semiconductor substrate when the surface of the semiconductor substrate is distorted. An exposure part exposes the surface of the semiconductor substrate to light using the correction values.Type: ApplicationFiled: August 12, 2013Publication date: August 14, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yumi NAKAJIMA, Kentaro MATSUNAGA, Eiji YONEDA
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Publication number: 20140213058Abstract: According one embodiment, a pattern formation method forming a resist layer on a pattern formation surface by pressing a template provided with a concave-convex from above the resist layer to form a resist pattern on the pattern formation surface, includes: forming a resist layer in a first region having an area smaller than an area of the pattern formation surface and in a second region other than the first region of the pattern formation surface; pressing a template against the resist layer; irradiating the resist layer with light via the template to form a first resist layer in the first region, curing of the first resist layer being suppressed, and form the resist pattern including a second resist layer, curing of the second resist layer proceeds in the second region; and removing the first resist layer from the first region, the curing of the first resist layer being suppressed.Type: ApplicationFiled: July 30, 2013Publication date: July 31, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kentaro Matsunaga, Nobuhiro Komine, Eiji Yoneda