Patents by Inventor Eiko HAYSASHI

Eiko HAYSASHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080105903
    Abstract: The invention provides a method for producing a group III nitride based semiconductor having a reduced number of crystal defects. A GaN layer 2 is epitaxially grown on a sapphire substrate 1 having C-plane as a main plane (FIG. 1A). Then, the layer is wet-etched by use of a 25% aqueous TMAH solution at 85° C. for one hour, to thereby form an etch pit 4 (FIG. 1B) Then, a GaN layer 5 is grown on the GaN layer 2 through the ELO method (FIG. 1C). The thus-formed GaN layer 5 has a screw dislocation density lower than that of the GaN layer 2.
    Type: Application
    Filed: October 24, 2007
    Publication date: May 8, 2008
    Applicants: KABUSHIKI KAISHA TOYOTA CHUO KENKYUSHO, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Masahito KODAMA, Eiko HAYSASHI, Masahiro SUGIMOTO