Patents by Inventor Einat Peled

Einat Peled has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11861824
    Abstract: An overlay metrology system may include a controller for receiving metrology data associated with a plurality of overlay targets on one or more samples; generating a reference metric for at least some of the plurality of overlay targets based on the metrology data, where the reference metric is associated with one or more properties of the respective overlay targets that contributes to overlay error; classifying the plurality of overlay targets into one or more groups based on the reference metrics calculated for the plurality of overlay targets; generating a reference image for at least some of the one or more groups; generating corrected metrology data using the associated reference image for at least some of the one or more groups; and generating overlay measurements for the plurality of overlay targets based on the corrected metrology data.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: January 2, 2024
    Assignee: KLA Corporation
    Inventors: Einat Peled, Naama Cohen, Yuval Lamhot
  • Patent number: 11615974
    Abstract: Systems and methods of optimizing wafer transport and metrology measurements in a fab are provided. Methods comprise deriving and updating dynamic sampling plans that provide wafer-specific measurement sites and conditions, deriving optimized wafer measurement paths for metrology measurements of the wafers that correspond to the dynamic sampling plan, managing FOUP (Front Opening Unified Pod) transport through the fab, transporting wafers to measurement tools while providing the dynamic sampling plans and the wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, and carrying out metrology and/or inspection measurements of the respective wafers by the respective measurement tools according to the derived wafer measurement paths.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: March 28, 2023
    Assignee: KLA CORPORATION
    Inventors: Amnon Manassen, Tzahi Grunzweig, Einat Peled, Anna Golotsvan
  • Publication number: 20210335638
    Abstract: Systems and methods of optimizing wafer transport and metrology measurements in a fab are provided. Methods comprise deriving and updating dynamic sampling plans that provide wafer-specific measurement sites and conditions, deriving optimized wafer measurement paths for metrology measurements of the wafers that correspond to the dynamic sampling plan, managing FOUP (Front Opening Unified Pod) transport through the fab, transporting wafers to measurement tools while providing the dynamic sampling plans and the wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, and carrying out metrology and/or inspection measurements of the respective wafers by the respective measurement tools according to the derived wafer measurement paths.
    Type: Application
    Filed: July 5, 2019
    Publication date: October 28, 2021
    Inventors: Amnon MANASSEN, Tzahi GRUNZWEIG, Einat PELED, Anna GOLOTSVAN
  • Patent number: 11158548
    Abstract: A method of determining overlay (“OVL”) in a pattern in a semiconductor wafer manufacturing process comprises capturing images from a cell in a metrology target formed in at least two different layers in the wafer with parts of the target offset in opposing directions with respect to corresponding parts in a different layer. The images may be captured using radiation of multiple different wavelengths, each image including +1 and ?1 diffraction patterns. A first and second differential signal may be determined for respective pixels in each image by subtracting opposing pixels from the +1 and ?1 diffraction orders for each of the multiple wavelengths. An OVL for the respective pixels may be determined based on analyzing the differential signals from multiple wavelengths simultaneously. Then an OVL for the pattern may be determined as a weighted average of the OVL of the respective pixels.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: October 26, 2021
    Assignee: KLA-Tencor Corporation
    Inventors: Yuval Lamhot, Eran Amit, Einat Peled, Noga Sella, Wei-Te Cheng, Ido Adam
  • Publication number: 20200381312
    Abstract: A method of determining overlay (“OVL”) in a pattern in a semiconductor wafer manufacturing process comprises capturing images from a cell in a metrology target formed in at least two different layers in the wafer with parts of the target offset in opposing directions with respect to corresponding parts in a different layer. The images may be captured using radiation of multiple different wavelengths, each image including +1 and ?1 diffraction patterns. A first and second differential signal may be determined for respective pixels in each image by subtracting opposing pixels from the +1 and ?1 diffraction orders for each of the multiple wavelengths. An OVL for the respective pixels may be determined based on analyzing the differential signals from multiple wavelengths simultaneously. Then an OVL for the pattern may be determined as a weighted average of the OVL of the respective pixels.
    Type: Application
    Filed: September 3, 2018
    Publication date: December 3, 2020
    Inventors: Yuval Lamhot, Eran Amit, Einat Peled, Noga Sella, Wei-Te Cheng, Ido Adam
  • Patent number: 10699969
    Abstract: Methods applicable in metrology modules and tools are provided, which enable adjusting metrology measurement parameters with respect to process variation, without re-initiating metrology recipe setup. Methods comprise, during an initial metrology recipe setup, recording a metrology process window and deriving baseline information therefrom, and during operation, quantifying the process variation with respect to the baseline information, and adjusting the metrology measurement parameters within the metrology process window with respect to the quantified process variation. The quick adjustment of metrology parameters avoids metrology-related process delays and releases prior art bottlenecks related thereto. Models of effects of various process variation factors on the metrology measurements may be used to enhance the derivation of required metrology tuning and enable their application with minimal delays to the production process.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: June 30, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Einat Peled, Eran Amit, Alexander Svizher, Yuval Lamhot, Noga Sella, Wei-Te Cheng
  • Patent number: 10504802
    Abstract: A method of overlay control in silicon wafer manufacturing comprises firstly locating a target comprising a diffraction grating on a wafer layer; and then measuring the alignment of patterns in successive layers of the wafer. The location of the target may be done by the pupil camera rather than a vision camera by scanning the target to obtain pupil images at different locations along a first axis. The pupil images may comprise a first order diffraction pattern for each location. A measurement of signal intensity in the first order diffraction pattern is then obtained for each location. The variation of signal intensity with location along each axis is then analyzed to calculate the location of a feature in the target.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: December 10, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Naomi Ittah, Nadav Gutman, Eran Amit, Vincent Immer, Einat Peled
  • Publication number: 20190074227
    Abstract: Methods applicable in metrology modules and tools are provided, which enable adjusting metrology measurement parameters with respect to process variation, without re-initiating metrology recipe setup. Methods comprise, during an initial metrology recipe setup, recording a metrology process window and deriving baseline information therefrom, and during operation, quantifying the process variation with respect to the baseline information, and adjusting the metrology measurement parameters within the metrology process window with respect to the quantified process variation. The quick adjustment of metrology parameters avoids metrology-related process delays and releases prior art bottlenecks related thereto. Models of effects of various process variation factors on the metrology measurements may be used to enhance the derivation of required metrology tuning and enable their application with minimal delays to the production process.
    Type: Application
    Filed: April 5, 2018
    Publication date: March 7, 2019
    Inventors: Einat Peled, Eran Amit, Alexander Svizher, Yuval Lamhot, Noga Sella, Wei-Te Cheng
  • Publication number: 20180301385
    Abstract: A method of overlay control in silicon wafer manufacturing comprises firstly locating a target comprising a diffraction grating on a wafer layer; and then measuring the alignment of patterns in successive layers of the wafer. The location of the target may be done by the pupil camera rather than a vision camera by scanning the target to obtain pupil images at different locations along a first axis. The pupil images may comprise a first order diffraction pattern for each location. A measurement of signal intensity in the first order diffraction pattern is then obtained for each location. The variation of signal intensity with location along each axis is then analyzed to calculate the location of a feature in the target.
    Type: Application
    Filed: October 24, 2017
    Publication date: October 18, 2018
    Inventors: Naomi Ittah, Nadav Gutman, Eran Amit, Vincent Immer, Einat Peled