Patents by Inventor Eiryo Takasuka

Eiryo Takasuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090148704
    Abstract: A vapor-phase process apparatus and a vapor-phase process method capable of satisfactorily maintaining quality of processes even when different types of processes are performed are obtained. A vapor-phase process apparatus includes a process chamber, gas supply ports serving as a plurality of gas introduction portions, and a gas supply portion (a gas supply member, a pipe, a flow rate control device, a pipe, and a buffer chamber). The process chamber allows flow of a reaction gas therein. The plurality of gas supply ports are formed in a wall surface (upper wall) of the process chamber along a direction of flow of the reaction gas. The gas supply portion can supply a gas into the process chamber at a different flow rate from each of one gas supply port and another gas supply port different from that one gas supply port among the plurality of gas supply ports.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 11, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Eiryo TAKASUKA, Toshio Ueda, Toshiyuki Kuramoto, Masaki Ueno
  • Publication number: 20090126635
    Abstract: Affords MOCVD reactors with which, while deposited films are uniformized in thickness, film deposition efficiency can be improved. An MOCVD reactor (1) is furnished with a susceptor (5) and a duct (11). The susceptor (5) has a carrying surface for heating and carrying substrates (20). The duct (11) is for conducting reaction gas (G) to the substrates (20). The susceptor (5) is rotatable with the carrying surface fronting on the duct (11) interior. The duct (11) has channels (11b) and (11c), which merge on the duct end upstream of Point A4. The height of the duct (11) running along the reaction gas (G) flow direction monotonically diminishes heading toward the duct downstream end from Point P1 to Point P2, stays constant from Point P2 to Point P3, and monotonically diminishes heading downstream from Point P3. Point P1 lies upstream of Point A4, while Point P3 lies on the susceptor (5).
    Type: Application
    Filed: November 14, 2008
    Publication date: May 21, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki Ueno, Eiryo Takasuka
  • Patent number: 7387678
    Abstract: A GaN substrate comprises a GaN single crystal substrate, an AlxGa1-xN intermediate layer (0<x?1) epitaxially grown on the substrate, and an GaN epitaxial layer grown on the intermediate layer. The intermediate layer is made of AlGaN and this AlGaN grows over the entire surface of the substrate with contaminants thereon and high dislocation regions therein. Thus, the intermediate layer is normally grown on the substrate, and a growth surface of the intermediate layer can be made flat. Since the growth surface is flat, a growth surface of the GaN epitaxial layer epitaxially grown on the intermediate layer is also flat.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: June 17, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Eiryo Takasuka, Masahiro Nakayama, Masaki Ueno, Kouhei Miura, Takashi Kyono
  • Publication number: 20080131979
    Abstract: Affords a vapor-phase growth system and vapor-phase growth method that enable gas leakage reduction. A vapor-phase growth system (1) is provided with a flow channel (4), a flow channel (5) linked to the downstream end of the flow channel (4), and susceptor (17) for supporting a substrate 21 so that the top surface of the substrate (21) is exposed in the interior space 11. A flow path (7) is formed by clearance between the outer peripheral surface (4a) of the flow channel 4 and the inner peripheral surface (5a) of the flow channel 5, leading from the interior region (11) to a hollow interior portion (8) in a reaction chamber (9), and a width W of the flow path (7) is from more than 3 mm to 10 mm or less.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 5, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Eiryo Takasuka
  • Publication number: 20080006208
    Abstract: Metal organic chemical vapor deposition equipment is metal organic chemical vapor deposition equipment for forming a film on a substrate by using a reactant gas, and includes a susceptor heating the substrate and having a holding surface for holding the substrate, and a flow channel for introducing the reactant gas to the substrate. The susceptor is rotatable with the holding surface kept facing an inner portion of the flow channel, and a height of the flow channel along a flow direction of the reactant gas is kept constant from a position to a position, and is monotonically decreased from the position to the downstream side. It is thereby possible to improve film formation efficiency while allowing the formed film to have a uniform thickness.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 10, 2008
    Inventors: Masaki Ueno, Toshio Ueda, Eiryo Takasuka
  • Publication number: 20050095861
    Abstract: The GaN single-crystal substrate 11 in accordance with the present invention has a polished surface subjected to heat treatment for at least 10 minutes at a substrate temperature of at least 1020° C. in a mixed gas atmosphere containing at least an NH3 gas. As a consequence, an atomic rearrangement is effected in the surface of the substrate 11 in which a large number of minute defects are formed by polishing, so as to flatten the surface of the substrate 11. Therefore, the surface of an epitaxial layer 12 formed on the substrate 11 can be made flat.
    Type: Application
    Filed: November 29, 2004
    Publication date: May 5, 2005
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., Institute of Materials Research & Engineering
    Inventors: Masaki Ueno, Eiryo Takasuka, Soo-Jin Chua, Peng Chen
  • Patent number: 6841274
    Abstract: The GaN single-crystal substrate 11 in accordance with the present invention has a polished surface subjected to heat treatment for at least 10 minutes at a substrate temperature of at least 1020° C. in a mixed gas atmosphere containing at least an NH3 gas. As a consequence, an atomic rearrangement is effected in the surface of the substrate 11 in which a large number of minute defects are formed by polishing, so as to flatten the surface of the substrate 11. Therefore, the surface of an epitaxial layer 12 formed on the substrate 11 can be made flat.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: January 11, 2005
    Assignees: Sumitomo Electric Industries, Ltd., Institute of Materials Research & Engineering
    Inventors: Masaki Ueno, Eiryo Takasuka, Soo-Jin Chua, Peng Chen
  • Publication number: 20040262624
    Abstract: A GaN substrate comprises a GaN single crystal substrate, an AlxGa1-xN intermediate layer (0<x≦1) epitaxially grown on the substrate, and an GaN epitaxial layer grown on the intermediate layer. The intermediate layer is made of AlGaN and this AlGaN grows over the entire surface of the substrate with contaminants thereon and high dislocation regions therein. Thus, the intermediate layer is normally grown on the substrate, and a growth surface of the intermediate layer can be made flat. Since the growth surface is flat, a growth surface of the GaN epitaxial layer epitaxially grown on the intermediate layer is also flat.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 30, 2004
    Inventors: Katsushi Akita, Eiryo Takasuka, Masahiro Nakayama, Masaki Ueno, Kouhei Miura, Takashi Kyono
  • Publication number: 20030209185
    Abstract: The GaN single-crystal substrate 11 in accordance with the present invention has a polished surface subjected to heat treatment for at least 10 minutes at a substrate temperature of at least 1020° C. in a mixed gas atmosphere containing at least an NH3 gas. As a consequence, an atomic rearrangement is effected in the surface of the substrate 11 in which a large number of minute defects are formed by polishing, so as to flatten the surface of the substrate 11. Therefore, the surface of an epitaxial layer 12 formed on the substrate 11 can be made flat.
    Type: Application
    Filed: May 8, 2003
    Publication date: November 13, 2003
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., INSTITUTE OF MATERIALS RESEARCH & ENGINEERING
    Inventors: Masaki Ueno, Eiryo Takasuka, Soo-Jin Chua, Peng Chen
  • Patent number: 6142663
    Abstract: This invention is intended to provide a semiconductor wafer temperature measuring method for use in reflector plate-equipped infrared annealing furnaces, infrared heating epitaxy furnaces, and other semiconductor wafer processing equipment that employs lamps as the heat source, the method affording easy and accurate measurement of substrate surface temperature, thereby enabling control of the heat source on the basis of these measurements. Characterizing features are the provision of a slit or small hole to the reflector plate and measuring light from the semiconductor wafer surface in the perpendicular direction by means of a scanning CCD sensor to allow substrate temperature to be measured on the basis of the radiant light distribution peak; and the provision of slits in a plurality of locations on the reflecting plate without impairing the function thereof, so that substrate temperature distribution can be measured accurately.
    Type: Grant
    Filed: January 21, 1999
    Date of Patent: November 7, 2000
    Assignee: Sumitomo Metal Industries, Inc.
    Inventor: Eiryo Takasuka