Abstract: An electric fuse including a fuse body and a fuse pad has a lamination structure of a polysilicon film and a cobalt silicide film. In the fuse body, a first portion having a first thickness and a second portion having a second thickness are formed. The first thickness is smaller than the second thickness. The polysilicon film is formed such that a thickness of the polysilicon film in the first portion becomes smaller than a thickness of the polysilicon film in the second portion.

Abstract: A semiconductor device includes a semiconductor substrate SUB, a semiconductor layer EP formed on the semiconductor substrate SUB, a buried layer PBL formed between the semiconductor layer EP and the semiconductor substrate SUB, an isolation layer PiSO formed in the semiconductor layer EP so as to be in contact with the buried layer PBL, and a conductive film FG formed over the isolation layer PiSO via an insulating film IF, whereby a first capacitive element including the conductive film FG as an upper electrode, the insulating film IF as a capacitive insulating film, and the isolation layer PiSO as a lower electrode, is formed over the semiconductor substrate SUB.

Abstract: A semiconductor device capable of lowering a temperature coefficient and increasing a sheet resistance value (?s value) and a manufacturing method thereof are provided. The resistive layer RL is made of polycrystalline silicon containing boron. The concentration distribution of boron in the thickness direction of the resistive layer RL includes a concentration peak PC and a low concentration portion LC having a concentration of boron lower than the concentration of boron in the concentration peak PC by two orders of magnitude or more.

Abstract: A semiconductor device includes a semiconductor substrate SUB, a semiconductor layer EP formed on the semiconductor substrate SUB, a buried layer PBL formed between the semiconductor layer EP and the semiconductor substrate SUB, an isolation layer PiSO formed in the semiconductor layer EP so as to be in contact with the buried layer PBL, and a conductive film FG formed over the isolation layer PiSO via an insulating film IF, whereby a first capacitive element including the conductive film FG as an upper electrode, the insulating film IF as a capacitive insulating film, and the isolation layer PiSO as a lower electrode, is formed over the semiconductor substrate SUB.

Abstract: A semiconductor device capable of lowering a temperature coefficient and increasing a sheet resistance value (ps value) and a manufacturing method thereof are provided. The resistive layer RL is made of polycrystalline silicon containing boron. The concentration distribution of boron in the thickness direction of the resistive layer RL includes a concentration peak PC and a low concentration portion LC having a concentration of boron lower than the concentration of boron in the concentration peak PC by two orders of magnitude or more.

Abstract: In a semiconductor device including a resistance element, an electrostatic protection element, including a parasitic bipolar transistor having the resistance element as a component, is provided. That is, instead of providing a dedicated electrostatic protection element in a semiconductor device, a function as an electrostatic protection element is also achieved by using a resistance element provided in a semiconductor device.

Abstract: An electrostatic protection element whose electrostatic breakdown resistance can be adjusted with a required minimum design change is provided. A semiconductor device includes an electrostatic protection element including a bipolar transistor whose base region and emitter region are electrically coupled together through a resistance region. At this time, the base region of the electrostatic protection element has a side including a facing portion that faces the collector region. The facing portion of the side includes an exposed portion that is exposed from an emitter wiring in plan view and a covered portion that is covered by the emitter wiring in plan view.

Abstract: As means for preventing a leakage of a fuse element cut by laser trimming due to a conductive residue or the like, an insulating film which has a high thermal conductivity and a relatively low adhesion is formed between an element isolation region and the fuse element in the case of forming the fuse element on the element isolation region in a groove on a main surface of an epitaxial substrate. When the fuse element is cut by performing the laser trimming, both of a part of the fuse element and the insulating film below the part of the fuse element are removed.

Abstract: An electrostatic protection element whose electrostatic breakdown resistance can be adjusted with a required minimum design change is provided. A semiconductor device includes an electrostatic protection element including a bipolar transistor whose base region and emitter region are electrically coupled together through a resistance region. At this time, the base region of the electrostatic protection element has a side including a facing portion that faces the collector region. The facing portion of the side includes an exposed portion that is exposed from an emitter wiring in plan view and a covered portion that is covered by the emitter wiring in plan view.

Abstract: In a semiconductor device including a resistance element, an electrostatic protection element, including a parasitic bipolar transistor having the resistance element as a component, is provided. That is, instead of providing a dedicated electrostatic protection element in a semiconductor device, a function as an electrostatic protection element is also achieved by using a resistance element provided in a semiconductor device.

Abstract: As means for preventing a leakage of a fuse element cut by laser trimming due to a conductive residue or the like, an insulating film which has a high thermal conductivity and a relatively low adhesion is formed between an element isolation region and the fuse element in the case of forming the fuse element on the element isolation region in a groove on a main surface of an epitaxial substrate. When the fuse element is cut by performing the laser trimming, both of a part of the fuse element and the insulating film below the part of the fuse element are removed.

Abstract: As means for preventing a leakage of a fuse element cut by laser trimming due to a conductive residue or the like, an insulating film which has a high thermal conductivity and a relatively low adhesion is formed between an element isolation region and the fuse element in the case of forming the fuse element on the element isolation region in a groove on a main surface of an epitaxial substrate. When the fuse element is cut by performing the laser trimming, both of a part of the fuse element and the insulating film below the part of the fuse element are removed.

Abstract: A method of forming an interconnect pattern in a semiconductor device includes the steps of pre-treating an interconnect layer, forming a photoresist pattern on the interconnect layer, heat treating the interconnect layer at a temperature between 280° C. and 400° C., and patterning the interconnect layer to form an interconnect pattern. The heat treatment re-distributes Cu particles segregated in the Al—Cu alloy layer during the O2-plasma pretreatment, preventing occurrence of a short-circuit failure.

Abstract: A method of forming an interconnect pattern in a semiconductor device includes the steps of pre-treating an interconnect layer, forming a photoresist pattern on the interconnect layer, heat treating the interconnect layer at a temperature between 280° C. and 400° C., and patterning the interconnect layer to form an interconnect pattern. The heat treatment re-distributes Cu particles segregated in the Al—Cu alloy layer during the O2-plasma pretreatment, preventing occurrence of a short-circuit failure.