Patents by Inventor Eisuke Tsuchiya

Eisuke Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11558114
    Abstract: Part of compensation of the transmission characteristics of the optical transmitter is performed by transmitter compensation circuitry disposed at a stage prior to the optical transmitter. Remaining part of compensation of the transmission characteristics of the optical transmitter and compensation of the transmission characteristics of the optical receiver is performed by a receiver compensation circuitry disposed at a stage subsequent to the optical receiver. Transmitter compensation characteristics of the transmitter compensation circuitry is set so that a peak-to-average-power ratio of an output signal from the transmitter compensation circuitry becomes equal to or smaller than a predetermined value.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: January 17, 2023
    Assignees: NTT Electronics Corporation, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Akihiro Yamagishi, Atsushi Hoki, Katsuya Tanaka, Eisuke Tsuchiya, Masanori Nakamura, Asuka Matsushita
  • Publication number: 20220173807
    Abstract: Part of compensation of the transmission characteristics of the optical transmitter is performed by transmitter compensation circuitry disposed at a stage prior to the optical transmitter. Remaining part of compensation of the transmission characteristics of the optical transmitter and compensation of the transmission characteristics of the optical receiver is performed by a receiver compensation circuitry disposed at a stage subsequent to the optical receiver. Transmitter compensation characteristics of the transmitter compensation circuitry is set so that a peak-to-average-power ratio of an output signal from the transmitter compensation circuitry becomes equal to or smaller than a predetermined value.
    Type: Application
    Filed: May 21, 2020
    Publication date: June 2, 2022
    Applicants: NTT Electronics Corporation, NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Akihiro YAMAGISHI, Atsushi HOKI, Katsuya TANAKA, Eisuke TSUCHIYA, Masanori NAKAMURA, Asuka MATSUSHITA
  • Patent number: 8593223
    Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: November 26, 2013
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Yasunobu Inabe, Eisuke Tsuchiya
  • Patent number: 8593201
    Abstract: In a signal output circuit, an input buffer externally receives a single-phase switching instruction signal to switch a state of the output circuit a shutdown disable state or a shutdown enable state, and converts and outputs the single-phase switching instruction signal into a differential switching instruction signal. A generation control circuit outputs a generation control signal for controlling generation of a control voltage in the control voltage generation circuit based on the differential switching instruction signal. A control voltage generation circuit outputs the control voltage upon changing a value of the control voltage in accordance with a logic of the single-phase switching instruction signal. An output circuit externally receives a differential input signal, outputs a differential output signal upon impedance-converting the differential input signal, and switches between the shutdown disable state and the shutdown enable state of the differential input signal.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: November 26, 2013
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Eisuke Tsuchiya
  • Publication number: 20120326782
    Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Yasunobu Inabe, Eisuke Tsuchiya
  • Publication number: 20120319766
    Abstract: In a signal output circuit, an input buffer externally receives a single-phase switching instruction signal to switch a state of the output circuit a shutdown disable state or a shutdown enable state, and converts and outputs the single-phase switching instruction signal into a differential switching instruction signal. A generation control circuit outputs a generation control signal for controlling generation of a control voltage in the control voltage generation circuit based on the differential switching instruction signal. A control voltage generation circuit outputs the control voltage upon changing a value of the control voltage in accordance with a logic of the single-phase switching instruction signal. An output circuit externally receives a differential input signal, outputs a differential output signal upon impedance-converting the differential input signal, and switches between the shutdown disable state and the shutdown enable state of the differential input signal.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 20, 2012
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Eisuke Tsuchiya