Abstract: A method in which a plurality of process are configured to hold a block of data destined for other processes, with data repacking circuitry including receiving circuitry configured to receive at least one block of data from a source process of the plurality of processes, the repacking circuitry configured to repack received data in accordance with at least one destination process of the plurality of processes, and sending circuitry configured to send the repacked data to the at least one destination process of the plurality of processes, receiving a set of data for all-to-all data exchange, the set of data being configured as a matrix, the matrix being distributed among the plurality of processes, and transposing the data by each of the plurality of processes sending matrix data from the process to the repacking circuitry, and the repacking circuitry receiving, repacking, and sending the resulting matrix data to destination processes.

Abstract: A network adapter includes a host interface and circuitry. The host interface is configured to connect locally between the network adapter and a host via a bus. The circuitry is configured to receive from one or more source nodes, over a communication network to which the network adapter is coupled, multiple packets destined to the host, and temporarily store the received packets in a queue of the network adapter, to send the stored packets from the queue to the host over the bus, to monitor a performance attribute of the bus, and in response to detecting, based at least on the monitored performance attribute, an imminent overfilling state of the queue, send a congestion notification to at least one of the source nodes from which the received packets originated.

Abstract: In one embodiment, an optical network system including a plurality of optical switches configured to switch beams of light which are modulated to carry information, a plurality of host computers comprising respective optical network interface controllers (NICs), optical fibers connecting the optical NICs and the optical switches forming an optically-switched communication network, over which optical circuit connections are established between pairs of the optical NICs over ones of the optical fibers via ones of the optical switches, the optically-switched communication network which including the optical NICs and the optical switches.

Abstract: A design tool for network interconnection includes a processor coupled to an input device and to an output device. The processor receives via the input device design parameters including: (i) a number G of groups of network elements, (ii) a number S of spines associated with each group, and (iii) a number P of ports that each spine has for connecting to other spines, using short-cable connections or long-cable connections. The processor determines an interconnection plan by specifying connections among spines belonging to different groups, in a clique or a bipartite scheme, so that for given values of G, S and P, (i) a number of the long-cable connections among the spines is minimized, and (ii) a number of inter-group connections is balanced among the G groups up to a deviation of a single connection. The processor outputs to the output device instructions for applying the interconnection plan.

Abstract: Network communication is carried out by sending packets from a source network interface toward a destination network interface, receiving one of the packets in an intermediate switch of the network, determining that the intermediate switch is experiencing network congestion, generating in the intermediate switch a congestion notification packet for the received packet, and transmitting the congestion notification packet from the intermediate switch to the source network interface via the network. The received packet is forwarded from the intermediate switch toward the destination network interface. The source network interface may modify a rate of packet transmission responsively to the congestion notification packet.

Abstract: One or more blocks of dynamic random access memory are embedded together with a processor and a data bus on an integrated circuit. The data bus has a bandwidth b for general operation including memory access, the block of dynamic random access memory further requiring data refresh at a refresh rate r. The block thus forms an eDRAM on the integrated circuit, typically an ASIC. A refresh controller embedded with the eDRAM may control refresh by clocking the data bus at a rate higher than the rate of the data bus to accommodate both the required memory access and the required data refresh.

Abstract: Communication apparatus includes multiple ports configured to serve as ingress and egress ports, such that the ingress ports receive packets from a packet data network for forwarding to respective egress ports. The ports include an egress port configured for connection to a network interface controller (NIC) serving multiple physical computing units, which have different, respective destination addresses and are connected to the NIC by different, respective communication channels. Control and queuing logic is configured to queue the packets that are received from the packet data network for forwarding to the multiple physical computing units in different, respective queues according to the destination addresses, and to arbitrate among the queues so as to convey the packets from the queues via the same egress port to the NIC, for distribution to the multiple physical computing units over the respective communication channels.

Abstract: An apparatus includes a network interface and a processor. The network interface is configured to communicate with a network that includes a plurality of switches interconnected in a Cartesian topology having a number D of dimensions. The processor is configured to hold, in a memory, a grid representation of the Cartesian topology, the grid representation including grid points associated respectively with the plurality of switches, to traverse the grid points and assign D-dimensional coordinates to the respective switches, and based on the assigned coordinates, to configure at least some of the switches with routing information via the network interface.

Abstract: Network communication is carried out by sending packets from a source network interface toward a destination network interface, receiving one of the packets in an intermediate switch of the network, determining that the intermediate switch is experiencing network congestion, generating in the intermediate switch a congestion notification packet for the received packet, and transmitting the congestion notification packet from the intermediate switch to the source network interface via the network. The received packet is forwarded from the intermediate switch toward the destination network interface. The source network interface may modify a rate of packet transmission responsively to the congestion notification packet.

Abstract: A method including providing a hardware-implemented networking system having a sending device, the sending device being configured to communicate with a receiving device via a communications medium, and performing the following at the sending device: providing an initial value for transmission timeout and setting a current value for transmission timeout to the initial value, sending one or more packets associated with a given queue from the sending device to the receiving device via the communications medium, setting a packet transmission timeout timer associated with the given queue to the current value for transmission timeout; and upon expiration of a packet transmission timeout timer associated with the given queue, performing the following: A. determining whether one or more packets have been successfully received by the receiving device, and performing one or both of the following steps B and C: B.

Abstract: A method includes, in a Network Interface Controller (NIC) that communicates over a network, generating indications pertaining to a performance of the NIC. The indications are classified with respect to severity. At least some of the indications, for which the severity exceeds a predefined severity threshold, are assembled in performance notification packets. The performance notification packets are sent over the network.

Abstract: A method in which a plurality of process are configured to hold a block of data destined for other processes, with data repacking circuitry including receiving circuitry configured to receive at least one block of data from a source process of the plurality of processes, the repacking circuitry configured to repack received data in accordance with at least one destination process of the plurality of processes, and sending circuitry configured to send the repacked data to the at least one destination process of the plurality of processes, receiving a set of data for all-to-all data exchange, the set of data being configured as a matrix, the matrix being distributed among the plurality of processes, and transposing the data by each of the plurality of processes sending matrix data from the process to the repacking circuitry, and the repacking circuitry receiving, repacking, and sending the resulting matrix data to destination processes.

Abstract: One or more blocks of dynamic random access memory are embedded together with a processor and a data bus on an integrated circuit. The data bus has a bandwidth b for general operation including memory access, the block of dynamic random access memory further requiring data refresh at a refresh rate r. The block thus forms an eDRAM on the integrated circuit, typically an ASIC. A refresh controller embedded with the eDRAM may control refresh by clocking the data bus at a rate higher than the rate of the data bus to accommodate both the required memory access and the required data refresh.

Abstract: A method including providing a hardware-implemented networking system having a sending device, the sending device being configured to communicate with a receiving device via a communications medium, and performing the following at the sending device: providing an initial value for transmission timeout and setting a current value for transmission timeout to the initial value, sending one or more packets associated with a given queue from the sending device to the receiving device via the communications medium, setting a packet transmission timeout timer associated with the given queue to the current value for transmission timeout; and upon expiration of a packet transmission timeout timer associated with the given queue, performing the following: A. determining whether one or more packets have been successfully received by the receiving device, and performing one or both of the following steps B and C: B.

Abstract: A network adapter includes a host interface and circuitry. The host interface is configured to connect locally between the network adapter and a host via a bus. The circuitry is configured to receive from one or more source nodes, over a communication network to which the network adapter is coupled, multiple packets destined to the host, and temporarily store the received packets in a queue of the network adapter, to send the stored packets from the queue to the host over the bus, to monitor a performance attribute of the bus, and in response to detecting, based at least on the monitored performance attribute, an imminent overfilling state of the queue, send a congestion notification to at least one of the source nodes from which the received packets originated.

Abstract: Communication apparatus includes multiple ports configured to serve as ingress and egress ports, such that the ingress ports receive packets from a packet data network for forwarding to respective egress ports. The ports include an egress port configured for connection to a network interface controller (NIC) serving multiple physical computing units, which have different, respective destination addresses and are connected to the NIC by different, respective communication channels. Control and queuing logic is configured to queue the packets that are received from the packet data network for forwarding to the multiple physical computing units in different, respective queues according to the destination addresses, and to arbitrate among the queues so as to convey the packets from the queues via the same egress port to the NIC, for distribution to the multiple physical computing units over the respective communication channels.

Abstract: A credit loop that produces a deadlock is identified in a network of switches that are interconnected for packet traffic flows therethrough. The identification is carried out by periodically transmitting respective credit loop control messages from the loop-participating switches via their deadlock-suspected egress ports to respective next-hop switches. The CLCMs has switch port-unique identifiers (SPUIDs). The loop is identified when in one of the next-hop switches the SPUID of a received CLCM is equal to the SPUID of a transmitted CLCM thereof. A master switch is selected for resolving the deadlock.

Abstract: An internally wireless datacenter rack configured to support datacenter computing equipment is provided. The datacenter rack includes a housing configured to receive a first networking box including a printed circuit board assembly and one or more wireless connectors in electrical communication with the printed circuit board assembly. The housing includes a second networking box including a printed circuit board assembly and one or more wireless connectors in electrical communication with the printed circuit board assembly. The one or more wireless connectors convert between electrical signals and optical signals. The datacenter rack includes a wireless free space region within the housing, and the wireless free space region includes a wireless reflective backplane that allows free space wireless communication between the first networking box and the second networking box.

Abstract: A network element processes a data flow in accordance with a communications protocol in which respective incremental sequence numbers are assigned to segments of the data flow. The segments are sent from the network element to the other network element in order of the sequence numbers, and respective acknowledgements are received from the other network element. The acknowledgements may include the highest sequence number of the segments of the flow that were received in the other network element. After transmitting the last segment of the data flow an additional segment is sent to the other network element. When it is determined from an acknowledgement of the additional segment that the last segment of the data flow was not received by the other network element, the last segment is retransmitted.

Abstract: An apparatus includes a network interface and a processor. The network interface is configured to communicate with a network that includes a plurality of switches interconnected in a Cartesian topology having multiple dimensions. The processor is configured to predefine an order among the dimensions of the Cartesian topology, to search for a preferred route via the network from a source switch to a destination switch, by evaluating candidate routes based at least on respective numbers of switches along the candidate routes for which traversal to a next-hop switch changes from one of the dimensions to another of the dimensions opposite to the predefined order, and to configure one or more of the switches in the network to route packets from the source switch to the destination switch along the preferred route.