Patents by Inventor Eitaro Ishimura

Eitaro Ishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7187013
    Abstract: An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor multiplication layer interposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a semiconductor light-absorbing layer interposed between the semiconductor multiplication layer and the second conductivity type semiconductor layer. The avalanche photodiode further comprises a multiplication suppressing layer which suppresses multiplication of charge carriers in the semiconductor light-absorbing layer, has a thickness of 0.6 ?m or less, and is located between the semiconductor light-absorbing layer and the second conductivity type semiconductor layer. The thickness of the semiconductor light-absorbing layer is 0.5 ?m or more.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: March 6, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura, Eiji Yagyu, Nobuyuki Tomita
  • Patent number: 7109523
    Abstract: A stem package with good high frequency characteristics for high-speed transmission at 10 Gbps and higher includes a stem which has an under surface, an upper surface and one or more through holes penetrating from the upper surface to the under surface, a mount for mounting, with an optical semiconductor device, on the upper surface, a lead terminal for signal supply penetrating one of the through holes with an insulator between the stem and the lead terminal, the upper surface having an earth conductor adjacent to the lead terminal for signal supply and Projecting from the upper surface so that a difference between the characteristic impedance of the transmission line constituted by the through hole, the insulator, and the lead terminal for signal supply and the characteristic impedance of the transmission line constituted by a lead terminal for signal supply projecting from the upper surface is small.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: September 19, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Publication number: 20060202297
    Abstract: A transmitted light absorption/recombination layer, a barrier layer, a wavelength selection/absorption layer, and an InP window layer having a p-type region are supported by an n-type substrate and arranged in that order. Light with a wavelength of 1.3 ?m reaches the wavelength selection/absorption layer through the InP window layer. Then, the light is absorbed by the wavelength selection/absorption layer and drawn from the device as an electric current signal. Light with a wavelength of 1.55 ?m reaches the transmitted light absorption/recombination layer through the barrier layer. Then, the light is absorbed by the transmitted light absorption/recombination layer, generating electrons and holes. These electrons and holes recombine with each other and hence disappear.
    Type: Application
    Filed: November 21, 2005
    Publication date: September 14, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Publication number: 20060186501
    Abstract: A laminated structure including an InGaAs light absorption layer and an InP window layer on a n-type InP substrate. A p-type diffusion layer region is formed in an InP window layer. A depletion layer between the n-type InP substrate and the p-type diffusion layer region is formed when a voltage is applied between a cathode electrode and an anode electrode. The depletion layer is thicker in at least a portion of a region under the anode electrode than in a light detecting portion. In this case, the diffusion depth of the p-type diffusion layer region may be smaller in at least the portion of the region under the anode electrode than in the light detecting portion.
    Type: Application
    Filed: December 2, 2005
    Publication date: August 24, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 7038251
    Abstract: A semiconductor device has a structure reducing resistances to a high frequency current. The semiconductor device includes a semi-insulating substrate, a first n-type layer made of a compound semiconductor, and a first p-type layer made of a compound semiconductor in which a signal current flows in a lateral direction, parallel to the semi-insulating substrate. The first p-type layer is sandwiched between the semi-insulating substrate and the first n-type layer. A second n type layer made of a compound semiconductor is between the semi-insulating substrate and the first p type layer. An alternating current component of the signal current flows through the second n type layer.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: May 2, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eitaro Ishimura, Masaharu Nakaji, Eiji Yagyu, Nobuyuki Tomita
  • Patent number: 7031587
    Abstract: A waveguide type photoreceptor device of the present invention comprises a waveguide 16a disposed on a Fe-doped InP substrate, the waveguide including an n-cladding layer connected to an n-electrode, an n-light guide layer, a light absorption layer, a p-light guide layer, and a p-cladding layer connected to a p-electrode, laminated onto one another over the Fe-doped InP substrate, and the ratio of the layer thickness of the thicker one of the n-light guide layer and the p-light guide layer to that of the thinner one being between 1.3 and 5 both inclusive.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: April 18, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Patent number: 7030477
    Abstract: A laser device includes a can package of a laser diode having a lead terminal secured to a through hole in a stem by a sealant, and a flexible substrate having a transmission line on a front surface of a polyimide film. The lead terminal of the can package and one end of a transmission line of the flexible substrate are connected by soldering. A resistor for matching the impedance of the transmission line and the impedance of the lead terminal is located in the vicinity of a connection of the transmission line and the lead terminal.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 18, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 7020375
    Abstract: Composition wavelengths of materials of cladding layers and optical guide layers are 0.92 ?m and 1.2 ?m respectively. When the thickness of optical guide layers, corresponding to an extreme value in which inclination of a sensitivity curve to 1.3 ?m-wavelength light and to 1.55 ?m-wavelength light with respect to a change in the thickness of each of both optical guide layers changes from positive to negative, are defined as d1 and d2, respectively, the thickness, dg, of optical guide layers of a light detecting element satisfies 0.75d1?dg?1.25d2.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: March 28, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20060043518
    Abstract: A semiconductor light detecting device includes an n-contact layer selectively disposed on an Fe—InP substrate. An optical waveguide layer is disposed on the n-contact layer and includes an n-cladding layer, a light absorption layer, and a p-cladding layer, laminated on one another, over the n-contact layer, in that order. An Fe—InP current blocking layer is disposed on the n-cladding layer such that sides of the optical waveguide layer are buried in the Fe—InP current blocking layer. A p-electrode includes a contact electrode electrically connected to the p-cladding layer of the optical waveguide layer, a lead-out electrode portion extending on a side wall of the current blocking layer from the contact electrode and extending on the Fe—InP substrate, and an electrode pad disposed on a surface of the Fe—InP substrate, with an SiN film between the electrode pad and the surface of the Fe—InP substrate and connected to the lead-out electrode portion.
    Type: Application
    Filed: May 20, 2005
    Publication date: March 2, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20060017129
    Abstract: An avalanche photodiode has improved low-noise characteristics, high-speed response characteristics, and sensitivity. The avalanche photodiode includes a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, a semiconductor multiplication layer interposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and a semiconductor light-absorbing layer interposed between the semiconductor multiplication layer and the second conductivity type semiconductor layer. The avalanche photodiode further comprises a multiplication suppressing layer which suppresses multiplication of charge carriers in the semiconductor light-absorbing layer, has a thickness of 0.6 ?m or less, and is located between the semiconductor light-absorbing layer and the second conductivity type semiconductor layer. The thickness of the semiconductor light-absorbing layer is 0.5 ?m or more.
    Type: Application
    Filed: May 25, 2005
    Publication date: January 26, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura, Eiji Yagyu, Nobuyuki Tomita
  • Publication number: 20050263787
    Abstract: A semiconductor devices has a structure reducing resistances to a high frequency current. The semiconductor device includes a semi-insulating substrate, a first n-type layer made of a compound semiconductor, and a first p-type layer made of a compound semiconductor in which a signal current flows in a lateral direction, parallel to the semi-insulating substrate. The first p-type layer is sandwiched between the semi-insulating substrate and the first n-type layer. A second n type layer made of a compound semiconductor is between the semi-insulating substrate and the first p type layer. An alternating current component of the signal current flows through the second n type layer.
    Type: Application
    Filed: January 21, 2005
    Publication date: December 1, 2005
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eitaro Ishimura, Masaharu Nakaji, Eiji Yagyu, Nobuyuki Tomita
  • Publication number: 20050230706
    Abstract: An objective is to provide an avalanche photodiode that is excellent in device characteristics such as reliability. An avalanche photodiode is provided, which includes a substrate 1 formed with a light receiving region 3 on a multiplication layer 119, and formed with layers of differing semiconductor type with the multiplication layer 119 intervening, a ring-shaped groove 7 formed on the end face of the substrate 1 on its light-receiving-region side, in such a way that the groove surrounds the light receiving region 3, and one or more steps 5 provided on a side wall of the ring-shaped groove 7, in a range of from ¼ to ¾ of the depth of the groove.
    Type: Application
    Filed: April 5, 2005
    Publication date: October 20, 2005
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Eiji Yagyu, Nobuyuki Tomita, Eitaro Ishimura, Masaharu Nakaji
  • Publication number: 20050224839
    Abstract: An avalanche photodiode according to this invention include a light receiving region 101 surrounded by a ring-shaped trench 13, a first electrode 11 formed on the light receiving region 101, a second electrode 12 formed on the periphery of the ring-shaped trench 13 surrounding the light receiving region, a first semiconductor layer lying just under the first electrode 11, and a second semiconductor layer lying just under the second electrode 12. Conductivity types of the first semiconductor and the second semiconductor are identical.
    Type: Application
    Filed: March 25, 2005
    Publication date: October 13, 2005
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Eiji Yagyu, Nobuyuki Tomita, Eitaro Ishimura, Masaharu Nakaji
  • Publication number: 20050194663
    Abstract: A laser device includes a can package of a laser diode having a lead terminal secured to a through hole in a stem by a sealant, and a flexible substrate having a transmission line on a front surface of a polyimide film. The lead terminal of the can package and one end of a transmission line of the flexible substrate are connected by soldering. A resistor for matching the impedance of the transmission line and the impedance of the lead terminal is located in the vicinity of a connection of the transmission line and the lead terminal.
    Type: Application
    Filed: February 9, 2005
    Publication date: September 8, 2005
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 6914706
    Abstract: An optical modulator whose cutoff frequency is not halved even in differential driving, as well as a mounting substrate of such an optical modulator and a driving method of such an optical modulator. An optical modulator manner that two electroabsorption EA modulators A and B are connected in series to each other via a transparent waveguide. When voltages are applied to the two EA modulators simultaneously, light that is input from an end face of the optical modulator is absorbed first by the EA modulator and then by the second EA modulator. Therefore, an extinction ratio that is two times larger than in a conventional optical modulator can be obtained. To prevent pulse superimposition in a modulated light waveform, one line may be made longer than another line so that a drive electrical signal reaches the second EA modulator with a delay. To mount the optical modulator, flip-chip mounting with a coupled coplanar substrate and gold balls or the like may be used.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: July 5, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Publication number: 20050047743
    Abstract: A waveguide type photoreceptor device of the present invention comprises a waveguide 16a disposed on a Fe-doped InP substrate, the waveguide including an n-cladding layer connected to an n-electrode, an n-light guide layer, a light absorption layer, a p-light guide layer, and a p-cladding layer connected to a p-electrode, laminated onto one another over the Fe-doped InP substrate, and the ratio of the layer thickness of the thicker one of the n-light guide layer and the p-light guide layer to that of the thinner one being between 1.3 and 5 both inclusive.
    Type: Application
    Filed: June 15, 2004
    Publication date: March 3, 2005
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20050025443
    Abstract: Composition wavelengths of materials of cladding layers and optical guide layers are 0.92 ?m and 1.2 ?m respectively. When the thickness of optical guide layers, corresponding to an extreme value in which inclination of a sensitivity curve to 1.3 ?m-wavelength light and to 1.55 ?m-wavelength light with respect to a change in the thickness of each of both optical guide layers changes from positive to negative, are defined as d1 and d2, respectively, the thickness, dg, of optical guide layers of a light detecting element satisfies 0.75d1?dg?1.25d2.
    Type: Application
    Filed: February 13, 2004
    Publication date: February 3, 2005
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20040188698
    Abstract: A stem package with good high frequency characteristics for high-speed transmission at 10 Gbps and higher includes a stem which has an under surface, an upper surface and one or more through holes penetrating from the upper surface to the under surface, a mount for mounting, with an optical semiconductor device, on the upper surface, a lead terminal for signal supply penetrating one of the through holes with an insulator between the stem and the lead terminal, the upper surface having an earth conductor adjacent to the lead terminal for signal supply and projecting from the upper surface so that a difference between the characteristic impedance of the transmission line constituted by the through hole, the insulator, and the lead terminal for signal supply and the characteristic impedance of the transmission line constituted by a lead terminal for signal supply projecting from the upper surface is small.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 30, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 6734519
    Abstract: A waveguide photodiode includes an n-type cladding layer, an n-type light confining layer, an i-type light absorption layer, a p-type light confining layer, and a p-type cladding layer buried in an Fe—InP blocking layer on a semiconductor substrate. At least one of the p-type light confining layer and the p-type cladding layer contains a p-type impurity selected from Be, Mg, and C. An undoped layer is preferably located between the i-type light absorption layer and the p-type light confining layer.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: May 11, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura
  • Publication number: 20040075154
    Abstract: A waveguide photodiode of the present invention is configured such that an n-type cladding layer 8, an n-type light confining layer 9, an i-type light absorption layer 10, a p-type light confining layer 11, and a p-type cladding layer 12 are buried in a Fe-InP blocking layer 14 in that order over a semiconductor substrate 2. At least one of the p-type light confining layer 11 and the p-type cladding layer 12 contains as a p-type impurity a material selected from a group consisting of Be, Mg, and C. An undoped layer is preferably formed between the i-type light absorption layer 10 and the p-type light confining layer 11.
    Type: Application
    Filed: March 17, 2003
    Publication date: April 22, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masaharu Nakaji, Eitaro Ishimura