Abstract: The objective of the present invention is to present a buffer circuit by which a load can be driven at a high speed while restraining an increase in power consumption. A current input to npn transistor Q1 via node N1 is detected by current detection circuit 1. At bias control circuit 2, base voltage of npn transistor Q2 is regulated in such a manner that the current of npn transistor Q2 decreases in accordance with an increase in said detected current, and the current of npn transistor Q2 increases in accordance with a decrease in the detected current. As a result, because transient current which can flow to the load can be increased, even when load capacitor CL has a large capacitance or when the frequency is high, the output voltage can quickly follow a change in the input voltage, so that distortion of the output voltage waveform can be restrained.

Abstract: A voltage supply circuit which suppresses generation of current spikes in the power source current in operation, reduce noise, simplify the circuit configuration, and decrease the cost. Clock signal CLK at a prescribed frequency is supplied to charge pump driver (10); current sources IS1, IS2, . . . IS6 work at timing set with clock signal CLK to output driving currents; and, corresponding to the driving currents, capacitors C1, C2 . . . are alternately charged or discharged; the charge stored in the capacitor of a preceding stage is sequentially sent to the later capacitor stage, and a boosted voltage higher than power source voltage Vcc is obtained at output terminal T2. In the charge pump type booster, since capacitors are driven with current sources, it is possible to reduce spike noise in the boosting operation, and influence on other analog circuits can be suppressed.

Abstract: The objective of the present invention is to present a buffer circuit by which a load can be driven at a high speed while restraining an increase in power consumption. A current input to npn transistor Q1 via node N1 is detected by current detection circuit 1. At bias control circuit 2, base voltage of npn transistor Q2 is regulated in such a manner that the current of npn transistor Q2 decreases in accordance with an increase in said detected current, and the current of npn transistor Q2 increases in accordance with a decrease in the detected current. As a result, because transient current which can flow to the load can be increased, even when load capacitor CL has a large capacitance or when the frequency is high, the output voltage can quickly follow a change in the input voltage, so that distortion of the output voltage waveform can be restrained.

Abstract: A multiplier having a simple constitution, excellent performance with respect to high-frequency characteristics and distortion characteristics, and allows low-voltage operation. Transistor Q11, resistors R11 and R12 form a common-emitter circuit. One signal of differential signal v1 is amplified by the common-emitter circuit, and the amplified signal is input to an emitter follower composed of transistor Q12. The output current of the emitter follower is input through resistor R13 into the current mirror circuit composed of transistors Q13 and Q14. Output current I5 of said current mirror circuit is input to the transistor pair of transistor Q19 and npn transistor Q20. By selecting an appropriate gain for the common-emitter circuit, currents I5 and I6 generated in this way become independent of the base-emitter voltage, and performance is improved with respect to distortion characteristics.

Abstract: A voltage supply circuit in which parasitic oscillation of a charge pump driver circuit can be restrained, charge pump driving currents can be generated at a stable oscillation frequency, and a desired boosting voltage can be supplied to a load circuit.

Abstract: A multiplier having a simple constitution, excellent performance with respect to high-frequency characteristics and distortion characteristics, and allows low-voltage operation. Transistor Q11, resistors R11 and R12 form a common-emitter circuit. One signal of differential signal v1 is amplified by the common-emitter circuit, and the amplified signal is input to an emitter follower composed of transistor Q12. The output current of the emitter follower is input through resistor R13 into the current mirror circuit composed of transistors Q13 and Q14. Output current I5 of said current mirror circuit is input to the transistor pair of transistor Q19 and npn transistor Q20. By selecting an appropriate gain for the common-emitter circuit, currents I5 and I6 generated in this way become independent of the base-emitter voltage, and performance is improved with respect to distortion characteristics.

Abstract: A voltage supply circuit which suppresses generation of current spikes in the power source current in operation, reduce noise, simplify the circuit configuration, and decrease the cost. Clock signal CLK at a prescribed frequency is supplied to charge pump driver (10); current sources IS1, IS2, . . . IS6 work at timing set with clock signal CLK to output driving currents; and, corresponding to the driving currents, capacitors C1, C2 . . . are alternately charged or discharged; the charge stored in the capacitor of a preceding stage is sequentially sent to the later capacitor stage, and a boosted voltage higher than power source voltage Vcc is obtained at output terminal T2. In the charge pump type booster, since capacitors are driven with current sources, it is possible to reduce spike noise in the boosting operation, and influence on other analog circuits can be suppressed.

Abstract: A voltage supply circuit in which parasitic oscillation of a charge pump driver circuit can be restrained, charge pump driving currents can be generated at a stable oscillation frequency, and a desired boosting voltage can be supplied to a load circuit.

Abstract: A driving circuit and a charging pump booster circuit capable of reducing the power consumption and the noise generated during switching. Transistors Q1 and Q2 are controlled based on a control signal input into an input terminal Tin, and a charge/discharge current is output to an output terminal Tout. The base of a transistor Q5, having almost the same characteristics as those of the transistor Q1, is connected to the base of the transistor Q1 in order to have the transistor Q5 generate a current corresponding to the turning on/off of the transistor Q1, and the current from said transistor Q5 is reflected toward a resistance element R1 by means of a current mirror circuit comprising transistors Q6 and Q7, so that base voltage of the transistor Q2 can be set lower while the transistor Q1 is on in order to hold the transistor Q2 to the OFF status. As a result, leak-through current in the transistors Q1 and Q2 can be reduced and switching noises created by said leak-through current can be reduced.