Abstract: A PLL circuit is provided with a lock/unlock detection circuit which detects the locked or unlocked state of the PLL circuit by comparing the phases of a horizontal synchronizing signal with each other and an internal synchronizing signal generating circuit which outputs the comparison signal as an internal synchronizing signal when the locked state is detected or outputs the horizontal synchronizing signal as an internal synchronizing signal when the unlocked state is detected. Another mode of a PLL circuit is provided with a skew detecting circuit which resets a frequency dividing circuit upon detecting a skew which is deviated from a normal period in an external synchronizing signal, generates a dummy pulse upon detecting that no skew occurs in the external synchronizing signal in the normal period, and generates a reference signal in combination of the dummy pulse with the external synchronizing signal. When the skew detection circuit detects a skew, the circuit also resets a phase comparator circuit.

Abstract: The present invention is concerned with a PLL comprising the phase comparator 20, loop filter 21, VCO 14 and loop counter 22, wherein there are further provided a prediction window circuit 23 for outputting HWIN (prediction window signal) for predicting the point at which the REF (reference signal) is generated, an omission compensation circuit 24 for detecting the omission of the REF at the time when HWIN is outputted and outputting d.VARX (the second correction signal) to offset the phase difference between d.REFX (the first correction signal) and the VAR (comparison signal) so that the phase comparator 20 outputs the signals Ph1 and Ph2 corresponding to the phase difference between the VAR and the d.REFX and the signals Ph1 and Ph2 corresponding to the phase difference between d.REFC and d.VARX when the omission of the REF has occurred, thereby enabling proper compensation for omission to be made and stable CLK (clock) to be generated even when VCO 14 having a very wide frequency variation range is used.