Patents by Inventor Ekkehard F. Miersch
Ekkehard F. Miersch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5232548Abstract: A multilayer, three-dimensional wiring matrix is fabricated from a plurality of individually testable plane pair sub-units (30). Each of the plane pair sub-units (30) includes a compensator (20) with capping layers (32) laminated on either side. The compensator (20) has a dielectric (14) encapsulated foil (10) which has been patterned with holes (12). Metallization patterns on the surfaces of the compensator (20) provide orthogonal wiring (22), electrical connections (24) to the foil (10), and electrical connections (26) between the top and bottom surfaces. The capping layer (32) includes joining metallurgy (38) at selected locations within a dielectric layer (36) that is in registry with the metallization in the vias (16). The joining metallurgy (38) may be a metal loaded thermoplastic and provides a seal for the vias (16) as well as planarizes the structure. The capping layers (32) may be formed in-situ on the compensator or separately.Type: GrantFiled: October 29, 1991Date of Patent: August 3, 1993Assignee: International Business Machines CorporationInventors: Scott G. Ehrenberg, L. Wynn Herron, Ekkehard F. Miersch, Jae Park, Janet L. Poetzinger
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Patent number: 5185073Abstract: A separable and reconnectable connection for electrical equipment is provided that is suitable for miniaturization in which vertical interdigitating members integrally attached and protruding from a planar portion are accommodated in control of damage in lateral displacement that occurs on mating with an opposite similar contact. Displacement damage is averted through accommodating lateral stresses by providing one or more of a conformal opposing contact, by strengthening through coating and base reinforcement and a deformable coating. The contacts are fabricated by physical and chemical processes including sputtering, normal and pulse electroplating and chemical vapor deposition. Pulse electroplating of palladium provides a dendritic deposit of uniform height, uniform rounded points and less branching. The contacts on completion are provided with a surrounding immobilizing material that enhances rigidity.Type: GrantFiled: April 29, 1991Date of Patent: February 9, 1993Assignee: International Business Machines CorporationInventors: Perminder S. Bindra, Jerome J. Cuomo, Thomas P. Gall, Anthony P. Ingraham, Sung K. Kang, Jungihl Kim, Paul Lauro, David N. Light, Voya R. Markovich, Ekkehard F. Miersch, Jaynal A. Molla, Douglas O. Powell, John J. Ritsko, George J. Saxenmeyer, Jr., Jack A. Varcoe, George F. Walker
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Patent number: 5173392Abstract: A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.Type: GrantFiled: April 3, 1992Date of Patent: December 22, 1992Assignee: International Business Machines, Corp.Inventors: Ekkehard F. Miersch, Jae M. Park
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Patent number: 5137461Abstract: A separable and reconnectable connection for electrical equipment is provided that is suitable for miniaturization in which vertical interdigitating members integrally attached and protruding from a planar portion are accommodated in control of damage in lateral displacement that occurs on mating with an opposite similar contact. Displacement damage is averted through accommodating lateral stresses by providing one or more of a conformal opposing contact, by strengthening through coating and base reinforcement and a deformable coating. The contacts are fabricated by physical and chemical processes including sputtering, normal and pulse electroplating and chemical vapor deposition. The contacts on completion are provided with a surrounding immobilizing material that enhances rigidity.Type: GrantFiled: October 30, 1990Date of Patent: August 11, 1992Assignee: International Business Machines CorporationInventors: Perminder S. Bindra, Jerome J. Cuomo, Thomas P. Gall, Anthony P. Ingraham, Sung K. Kang, Jungihl Kim, Paul Lauro, David N. Light, Voya R. Markovich, Ekkehard F. Miersch, Jaynal A. Molla, Douglas O. Powell, John J. Ritsko, George J. Saxenmeyer, Jr., Jack A. Varcoe, George F. Walker
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Patent number: 5122439Abstract: A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.Type: GrantFiled: August 28, 1989Date of Patent: June 16, 1992Assignee: International Business Machines Corp.Inventors: Ekkehard F. Miersch, Jae M. Park
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Patent number: 5028983Abstract: Electronic device packaging structures useful for electrically interconnecting an electronic device to a substrate. The structure contains at least two metallization layers with dielectric layers between adjacent to metallization layers. The dielectric layers can have variable thickness. Beam leads can project inwardly in cantilevered fashion over a central aperture through the dielectric layers. The inner ends of the beam leads lie substantially in one plane and can be bonded to contact pads on integrated circuit electronic devices. Beam leads can project outwardly from the metallization layers over outer edges of the dielectric layers for bonding to contact pads on a substrate. Signal leads on metallization layers can be symmetrically arranged between ground and voltage leads to provide optimal impedance properties. These structures are useful for tape automated bonding applications.Type: GrantFiled: October 27, 1988Date of Patent: July 2, 1991Assignee: International Business Machines CorporationInventors: Harry R. Bickford, Mark F. Bregman, Thomas M. Cipolla, John Gow, III, Peter G. Ledermann, Ekkehard F. Miersch, Leonard T. Olson, David P. Pagnani, Timothy C. Reiley, Uh-Po E. Tsou, Walter V. Vilkelis
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Patent number: 4937930Abstract: A process for hermetically sealing defects in a porous ceramic substrate comprising the steps of evaporating or sputtering a malleable metal layer onto the defective porous ceramic surface, swaging or smearing the malleable metal layer over the defects and depositing a second metal film over the swaged first film to provide a smooth defect free surface.Type: GrantFiled: October 5, 1989Date of Patent: July 3, 1990Assignee: International Business Machines CorporationInventors: James N. Humenik, Ekkehard F. Miersch, Charles H. Perry, Janusz S. Wilczynski
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Patent number: 4445202Abstract: For read-only storages and in particular for PLA applications, improved coupling elements together with an associated personalization scheme permit the storing of at least two memory (or logic) connection patterns selectable independently of each other. Quick electrical switching between at least two functional modes in the same storage array, is also provided. One device field effect transistor (FET) cells with specific gate configurations depending on the respective personalization state are used as coupling elements. For instance, in a two-fold personalization permanent storage, the coupling elements consist of FETs with two gate sections provided one beside the other. For a connection to be established in only one of the two possible functions at the respective crosspoint, one of the gate sections is connected to the control line provided for the functional selection. The remaining gate section is connected to the associated input line.Type: GrantFiled: November 2, 1981Date of Patent: April 24, 1984Assignee: International Business Machines CorporationInventors: Volkmar Goetze, Ekkehard F. Miersch, Guenther Potz
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Patent number: 4295183Abstract: An integrated circuit board for mounting very high density chips of small size on its top surface including conductor planes for carrying very large values of .DELTA.I (transient current) is constructed with a plurality of essentially flat parallel power planes serving as conductive leads to the chip connectors (pins or solder balls). The land areas on the top surface of the board are connected to conductors below by integrated coaxial conductor extensions from the planes having a high degree of capacitive coupling to adjacent conductor planes.Type: GrantFiled: June 29, 1979Date of Patent: October 13, 1981Assignee: International Business Machines CorporationInventors: Ekkehard F. Miersch, Lubomyr T. Romankiw