Abstract: A device, a computer implemented method, and a computer program product, the device including a capture device configured for capturing an image, and a processor configured to: receiving at least a part of an image captured by the capture device, analyzing the at least part of the image to determine a looking direction of a subject at an object, based on the looking direction, determining an engagement level of a subject with the object, and outputting the engagement level or whether the engagement level is in compliance with a required engagement level, while disabling transmission of information that enables reconstruction of the at least part of the image.

Abstract: A privacy protecting capture device, comprising: a camera; a memory device for storing at least one image captured by the camera; and a processor, the processor executing: a camera interface for receiving a captured image from the camera and storing at least a part of the at least one image in the memory device; an analysis engine for analyzing the at least one image; an output interface for outputting information related to the image; and a controller for activating the analysis engine, and disabling transmission of information that enables reconstruction of the at least one image from the output interface.

Abstract: A capture device and method, the capture device comprising: a camera ensemble, comprising one or more cameras, the camera ensemble adapted to obtain high resolution images and low resolution images; one or more processors configured to receive the high resolution images and the low resolution images from the camera ensemble and process the high resolution images and the low resolution images, and to output images or metadata; and a three-way switch, having an “off” state, an “auto” state and a “stream” state, wherein when the three-way switch is in “Off” state, no image or metadata is output by the processor, when the three-way switch is in “Auto” state, only metadata is output by the processor, and when the three-way switch is in “Stream” state, metadata and high resolution images can be output by the processor.

Abstract: Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.

Abstract: A semiconductor package such as a multi-chip package is disclosed. The semiconductor package may be configured for dual second level interconnection onto a printed circuit board of a host device. Thus, a single semiconductor package may be used on host printed circuit boards having different configurations.

Abstract: A data retention operation is performed in a non-volatile memory in response to detection of a triggering event. The data retention operation includes updating a value of a write parameter of the non-volatile memory and storing into the non-volatile memory at least one copy of contents of a boot portion of the non-volatile memory using the updated value of the write parameter. The updated value of the write parameter increases retention of stored data during extended periods of inactivity at the non-volatile memory.

Abstract: A data retention operation is performed in a non-volatile memory in response to detection of a triggering event. The data retention operation includes updating a value of a write parameter of the non-volatile memory and storing into the non-volatile memory at least one copy of contents of a boot portion of the non-volatile memory using the updated value of the write parameter. The updated value of the write parameter increases retention of stored data during extended periods of inactivity at the non-volatile memory.

Abstract: A semiconductor package such as a multi-chip package is disclosed. The semiconductor package may be configured for dual second level interconnection onto a printed circuit board of a host device. Thus, a single semiconductor package may be used on host printed circuit boards having different configurations.

Abstract: Systems and methods for configuring, controlling and operating a non-volatile cache are disclosed. A host system may poll a memory system as to the memory system's configuration of its non-volatile cache. Further, the host system may configure the non-volatile cache on the memory system, such as the size of the non-volatile cache and the type of programming for the non-volatile cache (e.g., whether the non-volatile cache is programmed according to SLC or the type of TRIM used to program cells in the non-volatile cache). Moreover, responsive to a command from the host to size the non-volatile cache, the memory system may over or under provision the cache. Further, the host may control operation of the non-volatile cache, such as by sending selective flush commands.

Abstract: A printing system includes a printing station; a finishing line controller for controlling operation of one or more finishing devices arrangeable in-line with the printing station and a first communication link between the printing station and the controller for communicating job commands from the printing station to the finishing line controller to be translated into finishing action commands by the finishing line controller and communicated to said one or more finishing devices.

Abstract: A method of handling internal operations of a storage device includes in response to information derived from one or more commands received from a host device when the storage device is coupled to the host device, determining whether a sequence of commands is in one of an active state, and a first transition state, where in the first transition state the sequence of commands is transitioning from an inactive state to the active state. The method includes, while the sequence of commands is in the active state or in the first transition state, refraining from executing any operation of a first set of internal memory management operations, each of the first set of internal memory management operations being an extra-sequence operation.

Abstract: A method of handling internal operations of a storage device includes in response to information derived from one or more commands received from a host device when the storage device is coupled to the host device, determining whether a sequence of commands is in one of an active state, and a first transition state, where in the first transition state the sequence of commands is transitioning from an inactive state to the active state. The method includes, while the sequence of commands is in the active state or in the first transition state, refraining from executing any operation of a first set of internal memory management operations, each of the first set of internal memory management operations being an extra-sequence operation.

Abstract: A method enables a storage device to autonomously (i.e., without intervention of a host device) determines whether an integral sequence of commands, which is related to one or more storage commands issued by the host device, is in a certain state (i.e., it is “active” or “inactive”) or is transitioning from “active” state to “inactive” state, or from “inactive” state to “active” state. Depending on the determined state or transition, the storage device determines whether to refrain from executing Extra-Sequence (“ESQ”) operations and permit executing Intra-Sequence (“ISQ”) operations, or vice versa.

Abstract: Protection against computer viruses is provided by a storage device having a memory, a controller, and a content scanning module used for scanning files for viruses. Infected files are indicated to a virus handling module that resides external to the storage device. The virus handling module may alter access to the infected files and/or indicate their presence to other system components. Such virus scanning mechanism can be built within the controller of the storage device. The protection against computer viruses may be provided by a method that includes transferring file data from the memory to the controller, reconstructing the files from the file data, activating the controller to check the reconstructed files for viruses, and indicating the infected files to the virus handling module. By using the controller within the storage device to scan for viruses, the burden on the host can be greatly reduced.

Abstract: A method enables a storage device to autonomously (i.e., without intervention of a host device) determines whether an integral sequence of commands, which is related to one or more storage commands issued by the host device, is in a certain state (i.e., it is “active” or “inactive”) or is transitioning from “active” state to “inactive” state, or from “inactive” state to “active” state. Depending on the determined state or transition, the storage device determines whether to refrain from executing Extra-Sequence (“ESQ”) operations and permit executing Intra-Sequence (“ISQ”) operations, or vice versa.

Abstract: A method of handling internal operations of a storage device includes in response to information derived from one or more commands received from a host device when the storage device is coupled to the host device, determining whether a sequence of commands is in one of an active state, and a first transition state, where in the first transition state the sequence of commands is transitioning from an inactive state to the active state. The method includes, while the sequence of commands is in the active state or in the first transition state, refraining from executing any operation of a first set of internal memory management operations, each of the first set of internal memory management operations being an extra-sequence operation.