Abstract: A structural feature of an optical connector assembly in which an optical chip is connectable with a fixed ferrule via a waveguide and is joined onto a section of a substrate. The structural feature includes a structural section disposed on one of the optical chip and the substrate and a ferrule support section that extends from the structural section and comprises a surface for adhesion to the fixed ferrule.

Abstract: A structural feature of an optical connector assembly in which an optical chip is connectable with a fixed ferrule via a waveguide and is joined onto a section of a substrate. The structural feature includes a structural section disposed on one of the optical chip and the substrate and a ferrule support section that extends from the structural section and comprises a surface for adhesion to the fixed ferrule.

Abstract: Systems and methods are provided for obtaining measurements of an integrated circuit chip and a connected carrier to obtain the measurements of the interconnect heights. More specifically, a method is provided that includes defining a top best fit reference plane and a bottom best fit reference plane, and adjusting the top best fit reference and the bottom best fit reference to be superposed to one another. The method further includes calculating first distances between each height measurement for a first set of points and the adjusted top best fit reference plane, and calculating second distances between each height measurement for a second set of points and the adjusted bottom best fit reference plane. The method further includes calculating height values of a gap or interconnect between the first substrate and the second substrate by subtracting the thickness of the first substrate and the second distances from the first distances.

Abstract: An optical structure includes a substrate including a cavity on a first surface of the substrate, an optical component on the substrate and an adhesive applied to a side of the optical component to fix the optical component to the substrate. The optical component includes a recess on a second surface of the optical component, the second surface is opposed to the first surface of the substrate, and the recess is provided along an edge of the second surface.

Abstract: An optical structure includes a substrate including a cavity on a first surface of the substrate, an optical component on the substrate and an adhesive applied to a side of the optical component to fix the optical component to the substrate. The optical component includes a recess on a second surface of the optical component, the second surface is opposed to the first surface of the substrate, and the recess is provided along an edge of the second surface.

Abstract: Systems and methods for nanofiller in an optical interface are provided. One system includes a fiber-optic interface for one or more optical fibers that includes a body including one or more grooves defined therein. At least one groove in the one or more grooves is configured to receive a corresponding optical fiber of the one or more optical fibers. The at least one groove of the one or more grooves is further configured to receive an adhesive to attach the body to a portion of the corresponding optical fiber. Further, fiber-optic interface includes a suspended structure associated with the at least one groove configured to couple light between the suspended structure and the corresponding optical fiber. Also, the adhesive comprises nanofiller configured to support an alignment of the suspended structure with the corresponding optical fiber within the at least one groove.

Abstract: A photonic assembly includes an optical die including a suspended membrane structure arranged thereon. A cavity is arranged beneath the suspended membrane structure. An optical interconnect structure is arranged on the optical die. The photonic assembly also includes an optical adhesive arranged on the optical die in contact with the optical interconnect structure. The optical adhesive is arranged beneath the suspended membrane structure to at least partially fill the cavity beneath the suspended membrane structure. The photonic assembly also includes a structural adhesive arranged on the optical die adjacent to the optical adhesive.

Abstract: A photonic assembly includes an optical die including a suspended membrane structure arranged thereon. A cavity is arranged beneath the suspended membrane structure. An optical interconnect structure is arranged on the optical die. The photonic assembly also includes an optical adhesive arranged on the optical die in contact with the optical interconnect structure. The optical adhesive is arranged beneath the suspended membrane structure to at least partially fill the cavity beneath the suspended membrane structure. The photonic assembly also includes a structural adhesive arranged on the optical die adjacent to the optical adhesive.

Abstract: An optical structure includes a substrate including a cavity on a first surface of the substrate, an optical component on the substrate and an adhesive applied to a side of the optical component to fix the optical component to the substrate. The optical component includes a recess on a second surface of the optical component, the second surface is opposed to the first surface of the substrate, and the recess is provided along an edge of the second surface.

Abstract: An optical structure includes a substrate including a cavity on a first surface of the substrate, an optical component on the substrate and an adhesive applied to a side of the optical component to fix the optical component to the substrate. The optical component includes a recess on a second surface of the optical component, the second surface is opposed to the first surface of the substrate, and the recess is provided along an edge of the second surface.

Abstract: An optical structure includes a substrate including a cavity on a first surface of the substrate, an optical component on the substrate and an adhesive applied to a side of the optical component to fix the optical component to the substrate. The optical component includes a recess on a second surface of the optical component, the second surface is opposed to the first surface of the substrate, and the recess is provided along an edge of the second surface.

Abstract: Systems and methods are provided for obtaining measurements of an integrated circuit chip and a connected carrier to obtain the measurements of the interconnect heights. More specifically, a method is provided that includes defining a top best fit reference plane and a bottom best fit reference plane, and adjusting the top best fit reference and the bottom best fit reference to be superposed to one another. The method further includes calculating first distances between each height measurement for a first set of points and the adjusted top best fit reference plane, and calculating second distances between each height measurement for a second set of points and the adjusted bottom best fit reference plane. The method further includes calculating height values of a gap or interconnect between the first substrate and the second substrate by subtracting the thickness of the first substrate and the second distances from the first distances.

Abstract: Systems and methods are provided for obtaining measurements of an integrated circuit chip and a connected carrier to obtain the measurements of the interconnect heights. More specifically, a method is provided that includes defining a top best fit reference plane and a bottom best fit reference plane, and adjusting the top best fit reference and the bottom best fit reference to be superposed to one another. The method further includes calculating first distances between each height measurement for a first set of points and the adjusted top best fit reference plane, and calculating second distances between each height measurement for a second set of points and the adjusted bottom best fit reference plane. The method further includes calculating height values of a gap or interconnect between the first substrate and the second substrate by subtracting the thickness of the first substrate and the second distances from the first distances.

Abstract: Systems and methods are provided for obtaining measurements of an integrated circuit chip and a connected carrier to obtain the measurements of the interconnect heights. More specifically, a method is provided that includes defining a top best fit reference plane and a bottom best fit reference plane, and adjusting the top best fit reference and the bottom best fit reference to be superposed to one another. The method further includes calculating first distances between each height measurement for a first set of points and the adjusted top best fit reference plane, and calculating second distances between each height measurement for a second set of points and the adjusted bottom best fit reference plane. The method further includes calculating height values of a gap or interconnect between the first substrate and the second substrate by subtracting the thickness of the first substrate and the second distances from the first distances.

Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.

Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.

Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.

Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.