Abstract: This invention prevents illegal memory address faults on speculative data loads. Circular addressing of the address pointer limits memory access to a range of addresses including all addresses used by the address pointer and not including any invalid addresses. The invention uses circular addressing hardware, if available on the data processor. If not available, this invention simulates circular addressing. This invention permits loads to be issued earlier than if predication were used and allows already predicated loads to be speculated without the overhead of a compound predicate. This invention can be used on processors without hardware supporting speculation.

Abstract: This invention modifies an irregular software pipelined loop conditioned upon data in a condition register in a compiler scheduled very long instruction word data processor to prevent over-execution upon loop exit. The method replaces a register modifying instruction with an instruction conditional upon the inverse condition register if possible. The method inserts a conditional register move instruction to a previously unused register within the loop if possible without disturbing the schedule. Then a restoring instruction is added after the loop. Alternatively, both these two functions can be performed by a delayed register move instruction. Instruction insertion is into a previously unused instruction slot of an execute packet. These changes can be performed manually or automatically by the compiler.

Abstract: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.

Abstract: The present invention provides methods specifically geared to finding natural splits in wide, nearly symmetric dependence graphs and assigning the components of the split to clusters in a VLIW processor. The basic approach of these methods is to assign a node n of the dependence graph to the cluster to which it has the strongest affinity. A node n has the strongest affinity to the cluster containing its closest common ancestor node. Then, the mirror image node or nodes of the node n are located if they are present in the graph and are assigned to other clusters in the processor to which they have the strongest affinity.

Abstract: A method for software pipelining of irregular conditional control loops including pre-processing the loops so they can be safely software pipelined. The pre-processing step ensures that each original instruction in the loop body can be over-executed as many times as necessary. During the pre-processing stage, each instruction in the loop body is processing in turn (N4). If the instruction can be safely speculatively executed, it is left alone (N6). If it could be safely speculatively executed except that it modifies registers that are live out of the loop, then the instruction can be pre-processed using predication or register copying (N7, N8, N9). Otherwise, predication must be applied (N10). Predication is the process of guarding an instruction. When the guard condition is true, the instruction executes as though it were unguarded. When the guard condition is false, the instruction is nullified.

Abstract: A method for reducing total code size in a processor having an exposed pipeline may include the steps of determining a latency between a load instruction, and a using instruction and inserting a NOP field into the defining or using instruction. When inserted into the load instruction, the NOP field defines the following latency following the load instruction. When inserted into the using instruction, the NOP field defines the latency preceding the using instruction. In addition, a method for reducing total code size during branching may include the steps of determining a latency following a branch instruction for initiating a branch from a first point to a second point in an instruction stream, and inserting a NOP field into the branch instruction.

Abstract: A method for reducing a code size of a software pipelined loop, the software pipelined loop having a kernel and an epilog. The method includes first evaluating a stage of the epilog. This includes selecting a stage of the epilog to evaluate (504) and evaluating an instruction in a reference stage. This includes identifying an instruction in the reference stage that is not present in the selected stage of the epilog (506) and determining if the identified instruction can be speculated (508). If the identified instruction can be speculated, such is noted. If the instruction cannot be speculated, it is determined whether the identified instruction can be predicated (512). If the instruction can be predicated, it is marked as needing predication (514). Next, it is determined if another instruction in the reference stage is not present in the selected stage of the epilog (510). If there is, the instruction evaluation is repeated.

Abstract: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.

Abstract: The present invention provides methods specifically geared to finding natural splits in wide, nearly symmetric dependence graphs and assigning the components of the split to clusters in a VLIW processor. The basic approach of these methods is to assign a node n of the dependence graph to the cluster to which it has the strongest affinity. A node n has the strongest affinity to the cluster containing its closest common ancestor node. Then, the mirror image node or nodes of the node n are located if they are present in the graph and are assigned to other clusters in the processor to which they have the strongest affinity.

Abstract: A program memory controller unit includes apparatus for the execution of a software pipeline loop procedure in response to a predetermined instruction. The apparatus provides a prolog, a kernel, and an epilog state for the execution of the software pipeline procedure. In addition, in response to a predetermined condition, the software pipeline procedure can be terminated early. A second software procedure can be initiated prior to the completion of first software procedure. An SPEXIT instruction is provided to permit the software pipeline program to terminate upon the identification of a preselected condition. The SPEXIT instruction is placed in the instruction sequence to insure that response to the instruction occurs after the prolog procedure has been completed. The SPEXIT instruction, upon identification of the preselected condition, results in the software pipeline loop procedure entering an idle state.

Abstract: A method for software pipelining of irregular conditional control loops including pre-processing the loops so they can be safely software pipelined. The pre-processing step ensures that each original instruction in the loop body can be over-executed as many times as necessary. During the pre-processing stage, each instruction in the loop body is processing in turn (N4). If the instruction can be safely speculatively executed, it is left alone (N6). If it could be safely speculatively executed except that it modifies registers that are live out of the loop, then the instruction can be pre-processed using predication or register copying (N7, N8, N9). Otherwise, predication must be applied (N10). Predication is the process of guarding an instruction. When the guard condition is true, the instruction executes as though it were unguarded. When the guard condition is false, the instruction is nullified.

Abstract: A method for reducing a code size of a software pipelined loop, the software pipelined loop having a kernel and an epilog. The method includes first evaluating a stage of the epilog. This includes selecting a stage of the epilog to evaluate (504) and evaluating an instruction in a reference stage. This includes identifying an instruction in the reference stage that is not present in the selected stage of the epilog (506) and determining if the identified instruction can be speculated (508). If the identified instruction can be speculated, such is noted. If the instruction cannot be speculated, it is determined whether the identified instruction can be predicated (512). If the instruction can be predicated, it is marked as needing predication (514). Next, it is determined if another instruction in the reference stage is not present in the selected stage of the epilog (510). If there is, the instruction evaluation is repeated.

Abstract: The present invention provides a method and apparatus for automatically determining which compiler options should be used in compiling a computer program. The present invention utilizes a set of encodable rules in combination with application-specific information obtained from a compiler user, and/or during the compilation process, and/or during run time, and which presents the compiler user with a set of recommended compiler options via a user interface. The user may then select the recommended compiler options to be applied on a program level, i.e., one set for an application, or on a module-per-module level, i.e., with potentially different recommendations for different modules of a program. The present invention utilizes user information obtained from interviewing the compiler user, such as, for example, failure tolerance, compile-time tolerance, application type, etc.

Abstract: The present invention provides a method and apparatus for automatically logging compiler options currently being used in a build environment and/or for replacing or supplementing the current compiler options with new compiler options without necessarily modifying the build environment. In accordance with a first embodiment of the present invention, a wrapper program is stored at a location in memory where the compiler program normally resides. Whenever a compiler user invokes the build process program, a command is generated which is intended to invoke the compiler program. However, instead of the compiler program being invoked by the command, the wrapper program is invoked. The wrapper program comprises a software routine which analyzes the compiler commands to determine which compiler options are designated in the compiler commands. The wrapper program causes a log file of the compiler options contained in the compiler commands to be generated, which is readable by a human and/or by a machine.