Patents by Inventor Elena Agranovsky

Elena Agranovsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11816039
    Abstract: Multi-mode protected memory in accordance with the present description includes a permanent mode and a transient mode of operation. In one embodiment of the permanent mode, an authentication key is programmable once and a write counter is not decrementable or resettable. In one embodiment of the transient mode, an authentication key may be programmed many times and a write counter may be reset many times. Other features and advantages may be realized, depending upon the particular application.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: November 14, 2023
    Assignee: Intel Corporation
    Inventors: Adrian Pearson, Bing Zhu, Elena Agranovsky, Tomas Winkler, Yang Huang
  • Publication number: 20220164293
    Abstract: Multi-mode protected memory in accordance with the present description includes a permanent mode and a transient mode of operation. In one embodiment of the permanent mode, an authentication key is programmable once and a write counter is not decrementable or resettable. In one embodiment of the transient mode, an authentication key may be programmed many times and a write counter may be reset many times. Other features and advantages may be realized, depending upon the particular application.
    Type: Application
    Filed: April 19, 2019
    Publication date: May 26, 2022
    Inventors: Adrian PEARSON, Bing ZHU, Elena AGRANOVSKY, Tomas WINKLER, Yang HUANG
  • Patent number: 10677618
    Abstract: Embodiments of the present disclosure provide techniques for sensor testing for computing devices during initial movement of the device, such as movement on a manufacturing line. In one instance, a device with integral sensor testing during initial movement of the device may include a plurality of sensors and a sensor test block coupled with the plurality of sensors, to detect, collect and/or report readings provided by at least some of the sensors in response to movement of the device between at least a first test station and a second test station. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Yael Yanai, Yehiel Shilo, Eli Kupermann, Chen-Hsun Wu, Elena Agranovsky, Marlon D. Bada
  • Patent number: 9820018
    Abstract: Described is an apparatus comprising: a processor operable to execute a virtual machine manager (VMM) which is to manage a virtual machine (VM) for a hardware intellectual property (IP) block; a communication fabric; and a hardware IP block coupled to the processor via the communication fabric, wherein the hardware IP block is to be coupled to a first set of one or more sensors, and wherein the VM and the hardware IP block are operable to process data collected from the first set.
    Type: Grant
    Filed: December 12, 2015
    Date of Patent: November 14, 2017
    Assignee: Intel Corporation
    Inventors: Eli Kupermann, Suryaprasad Kareenahalli, Christian Soby, Amit Kimelman, Rajasekaran Andiappan, Elena Agranovsky
  • Publication number: 20170254683
    Abstract: Embodiments of the present disclosure provide techniques for sensor testing for computing devices during initial movement of the device, such as movement on a manufacturing line. In one instance, a device with integral sensor testing during initial movement of the device may include a plurality of sensors and a sensor test block coupled with the plurality of sensors, to detect, collect and/or report readings provided by at least some of the sensors in response to movement of the device between at least a first test station and a second test station. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventors: Yael Yanai, Yehiel Shilo, Eli Kupermann, Chen-Hsun Wu, Elena Agranovsky, Marlon D. Bada
  • Patent number: 9684360
    Abstract: In one embodiment, a processor comprises: at least one core to execute instructions; a memory coupled to the at least one core, the memory including a plurality of pages to store information; and a page manager coupled to the memory, the page manager to access metadata of a page table entry associated with a page of the memory and update usage information of an entry of a database, the entry of the database associated with the page of the memory. The page manager may cause at least a portion of the memory to be dynamically powered down based at least in part on the usage information. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: June 20, 2017
    Assignee: Intel Corporation
    Inventors: Eli Kupermann, Elena Agranovsky
  • Publication number: 20170171645
    Abstract: Described is an apparatus comprising: a processor operable to execute a virtual machine manager (VMM) which is to manage a virtual machine (VM) for a hardware intellectual property (IP) block; a communication fabric; and a hardware IP block coupled to the processor via the communication fabric, wherein the hardware IP block is to be coupled to a first set of one or more sensors, and wherein the VM and the hardware IP block are operable to process data collected from the first set.
    Type: Application
    Filed: December 12, 2015
    Publication date: June 15, 2017
    Inventors: Eli Kupermann, Suryaprasad Kareenahalli, Christian Soby, Amit Kimelman, Rajasekaran Andiappan, Elena Agranovsky
  • Publication number: 20160124490
    Abstract: In one embodiment, a processor comprises: at least one core to execute instructions; a memory coupled to the at least one core, the memory including a plurality of pages to store information; and a page manager coupled to the memory, the page manager to access metadata of a page table entry associated with a page of the memory and update usage information of an entry of a database, the entry of the database associated with the page of the memory. The page manager may cause at least a portion of the memory to be dynamically powered down based at least in part on the usage information. Other embodiments are described and claimed.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 5, 2016
    Inventors: Eli Kupermann, Elena Agranovsky