Patents by Inventor Eli Zyss

Eli Zyss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9170816
    Abstract: A processor includes one or more processing units, an execution pipeline and control circuitry. The execution pipeline includes at least first and second pipeline stages that are cascaded so that program instructions, specifying operations to be performed by the processing units in successive cycles of the pipeline, are fetched from a memory by the first pipeline stage and conveyed to the second pipeline stage, which causes the processing units to perform the specified operations. The control circuitry is coupled, upon determining that a program instruction that is present in the second pipeline stage in a first cycle of the pipeline is to be executed again in a subsequent cycle of the pipeline, to cause the execution pipeline to reuse the program instruction in one of the pipeline stages without re-fetching the program instruction from the memory.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: October 27, 2015
    Assignee: ALTAIR SEMICONDUCTOR LTD.
    Inventors: Edan Almog, Nohik Semel, Yigal Bitran, Nadav Cohen, Yoel Livne, Eli Zyss
  • Publication number: 20100180102
    Abstract: A processor includes one or more processing units, an execution pipeline and control circuitry. The execution pipeline includes at least first and second pipeline stages that are cascaded so that program instructions, specifying operations to be performed by the processing units in successive cycles of the pipeline, are fetched from a memory by the first pipeline stage and conveyed to the second pipeline stage, which causes the processing units to perform the specified operations. The control circuitry is coupled, upon determining that a program instruction that is present in the second pipeline stage in a first cycle of the pipeline is to be executed again in a subsequent cycle of the pipeline, to cause the execution pipeline to reuse the program instruction in one of the pipeline stages without re-fetching the program instruction from the memory.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 15, 2010
    Applicant: ALTAIR SEMICONDUCTORS
    Inventors: Edan Almog, Nohik Semel, Yigal Bitran, Nadav Cohen, Yoel Livne, Eli Zyss
  • Patent number: 7120546
    Abstract: A scheme to provide a spectral view of the signals present at the customer premises equipment by the network operator and includes a digital signal processor (DSP) or other signal processing apparatus integrated into a customer premises equipment (CPE) tuner in which the DSP or other signal processing apparatus is operational to perform a spectral analysis.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: October 10, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Eli Zyss, Uri Garbi, Alon Elhanati
  • Publication number: 20040212385
    Abstract: A scheme to provide a spectral view of the signals present at the customer premises equipment without requiring an operator to visit the customer's site comprises a DSP or other signal processing apparatus integrated into a CPE tuner in which the DSP or other signal processing apparatus is operational to perform a spectral analysis. The scheme is particularly useful in cable broadband applications, other RF applications, and specifically point to multi-point applications.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 28, 2004
    Inventors: Eli Zyss, Uri Garbi, Alon Elhanati