Patents by Inventor Elias E. Shihadeh

Elias E. Shihadeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5814847
    Abstract: A multi-chip module interconnection substrate includes at least two layers of conductive traces separated by an intervening layer of insulating material. The conductive traces include straight segments and diagonal segments. A plurality of conductive vias, each including conductive via wing extensions, allow one to make electrical connections between the various conductive trace layers. The conductive vias are formed such that a narrow, non-conductive, gap exists between the via wing extensions and the conductive traces. The multi-chip module interconnection substrate is then programmed, e.g. in the field, by making electrical connections between the via wing extensions and the conductive traces using e.g. wire bonds or ball bonds formed by conventional wire bonding equipment.
    Type: Grant
    Filed: February 2, 1996
    Date of Patent: September 29, 1998
    Assignee: National Semiconductor Corp.
    Inventors: Elias E. Shihadeh, Peter M. Weiler