Abstract: A system and method for low-cost performance and compliance testing of local oscillators and transmitters for wireless RF applications. A preferred embodiment comprises observing a digital signal from within an RF circuit, manipulating the signal with digital signal processing techniques, and determining if the RF circuit passes a test based upon results from the manipulating. Since the signal is clocked at a much lower frequency than an RF output of the RF circuit and the manipulation is performed digitally, testing can be performed at different stages of the production cycle and expensive test equipment can be eliminated.

Abstract: An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillators to perform sensitivity testing. Tile on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated.

Abstract: A novel method and apparatus for defining process variation in a digital RF processor (DRP). The invention is well suited for use in highly integrated system on a chip (SoC) radio solutions that incorporate a very large amount of digital logic circuitry. The method and apparatus provide direct measurement of fabrication process variation in circuits without requiring any additional test equipment by utilizing a time to digital converter (TDC) circuit already present in the chip. The TDC circuit relies on the time delay in an inverter chain to sample a high speed CKV clock using a slow FREF clock. Calculation of inverse time provides a direct correlation for fabrication process variation in each die.

Abstract: A system and method for low-cost performance and compliance testing of local oscillators and transmitters for wireless RF applications. A preferred embodiment comprises observing a digital signal from within an RF circuit, manipulating the signal with digital signal processing techniques, and determining if the RF circuit passes a test based upon results from the manipulating. Since the signal is clocked at a much lower frequency than an RF output of the RF circuit and the manipulation is performed digitally, testing can be performed at different stages of the production cycle and expensive test equipment can be eliminated.