Patents by Inventor Elie A. Maalouf

Elie A. Maalouf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210194434
    Abstract: A power splitter for use in an amplifier (e.g., a Doherty amplifier) includes an input terminal, and first and second output terminals. The input terminal is configured to receive an input RF signal, the first output terminal is configured to produce a first RF output signal, and the second output terminal is configured to produce a second RF output signal. The power splitter also includes a first capacitance electrically coupled between the input terminal and the first output terminal, a second capacitance electrically coupled between the input terminal and the second output terminal, a first inductance electrically coupled between the input terminal and a ground reference node, a second inductance electrically coupled between the first output terminal and the ground reference node, a third inductance electrically coupled between the second output terminal and the ground reference node, and a resistance electrically coupled between the first and second output terminals.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventors: Hussain Hasanali Ladhani, Elie A. Maalouf
  • Publication number: 20210194443
    Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventors: Elie A. Maalouf, Yu-Ting David Wu, Lu Wang, Nick Yang
  • Publication number: 20210175186
    Abstract: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 10, 2021
    Inventors: Joseph Gerard Schultz, Jeffrey Kevin Jones, Elie A. Maalouf, Yu-Ting David Wu, Nick Yang
  • Patent number: 10972054
    Abstract: Embodiments of systems and method for automatically biasing power amplifiers using a controllable current source are disclosed. In an embodiment, a bias controller for a power amplifier includes a first reference device source/drain interface, a first controllable current source configured to generate a first reference current in response to a first current control signal and to provide the first reference current to the first reference device source/drain interface, a first reference device gate interface, a first current-to-voltage controller configured to generate a first stabilized voltage in response to the first reference current and to provide the first stabilized voltage to the first reference device gate interface, and a first power amplifier (PA) interface configured to output a first control voltage in response to the first stabilized voltage.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: April 6, 2021
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Xu Jason Ma
  • Publication number: 20210088389
    Abstract: Embodiments of a device and method are disclosed. In an embodiment, a calibration circuit for a temperature sensor circuit includes a current source configured to generate a temperature independent reference current and further includes a voltage window generator circuit. The voltage window generator circuit is configured to generate a voltage window for the temperature sensor circuit using at least the temperature independent reference current. The voltage window is defined by a first reference voltage and a second reference voltage. The voltage window generator circuit is further configured to control a width of the voltage window to include a range of proportional to absolute temperature (PTAT) voltage outputs of a temperature sensor in the temperature sensor circuit.
    Type: Application
    Filed: September 24, 2019
    Publication date: March 25, 2021
    Inventors: Xu Jason MA, Elie A. MAALOUF
  • Publication number: 20210080992
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a bias controller for an amplifier circuit involves obtaining temperature data corresponding to a temperature of the amplifier circuit, generating a proportional to absolute temperature (PTAT) bias voltage based on a first PTAT slope when the temperature is within a first range of temperatures or a second PTAT slope when the temperature is within a second range of temperatures, wherein the second PTAT slope is greater than the first PTAT slope, and biasing the amplifier circuit based on the generated PTAT bias voltage.
    Type: Application
    Filed: September 13, 2019
    Publication date: March 18, 2021
    Inventors: Elie A. MAALOUF, Xu Jason MA, Ngai-Ming LAU
  • Publication number: 20210075374
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a Doherty amplifier module includes a substrate including a mounting surface, and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output terminal faces a side of the second amplifier die including a second output terminal. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first and second signal paths.
    Type: Application
    Filed: September 6, 2019
    Publication date: March 11, 2021
    Inventors: Lu WANG, Elie A. MAALOUF, Joseph STAUDINGER, Jeffrey Kevin JONES
  • Patent number: 10903182
    Abstract: Embodiments of a method and device are disclosed. In an embodiment, a Doherty amplifier module includes a substrate including a mounting surface, and a carrier amplifier die, a first peaking amplifier die, and a second peaking amplifier die on the mounting surface. The carrier amplifier die includes a first output bond pad that has a first length and a first width. The first peaking amplifier die includes a second output bond pad including a first main pad portion having a second length and a second width and including a first side pad portion having a third length and a third width. At least one of the second width or the third width is greater than the first width. The second peaking amplifier includes a third output bond pad. A first wirebond array is coupled between the third output bond pad and at least the first side pad portion.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 26, 2021
    Assignee: NXP USA, Inc.
    Inventors: Lu Wang, Elie A. Maalouf
  • Publication number: 20200358404
    Abstract: Embodiments of systems and method for automatically biasing power amplifiers using a controllable current source are disclosed. In an embodiment, a bias controller for a power amplifier includes a first reference device source/drain interface, a first controllable current source configured to generate a first reference current in response to a first current control signal and to provide the first reference current to the first reference device source/drain interface, a first reference device gate interface, a first current-to-voltage controller configured to generate a first stabilized voltage in response to the first reference current and to provide the first stabilized voltage to the first reference device gate interface, and a first power amplifier (PA) interface configured to output a first control voltage in response to the first stabilized voltage.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 12, 2020
    Inventors: Elie A. Maalouf, Xu Jason Ma
  • Patent number: 10785862
    Abstract: Methods for producing high thermal performance microelectronic modules containing sinter-bonded heat dissipation structures. In one embodiment, the method includes embedding a sinter-bonded heat dissipation structure in a module substrate. The step of embedding may entail applying a sinter precursor material containing metal particles into a cavity provided in the module substrate, and subsequently sintering the sinter precursor material at a maximum processing temperature less than a melt point of the metal particles to produce a sintered metal body bonded to the module substrate. A microelectronic device and a heatsink are then attached to the module substrate before, after, or concurrent with sintering such that the heatsink is thermally coupled to the microelectronic device through the sinter-bonded heat dissipation structure. In certain embodiments, the microelectronic device may be bonded to the module substrate at a location overlying the thermally-conductive structure.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: September 22, 2020
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Elie A. Maalouf, Geoffrey Tucker
  • Patent number: 10742173
    Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that enables fast switching between an on state bias voltage and an off state bias voltage for the power amplifier. The bias controller can transition a low impedance switch to an on state to electrically couple a first electrode of a charge holding capacitor to an input of the power amplifier. The charge holding capacitor can be pre charged with the on state bias voltage to quickly provide the on state bias voltage to the power amplifier. The bias controller can also transition the low impedance switch to an off state to couple the input of the power amplifier to the off state bias voltage.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: August 11, 2020
    Assignee: NXP USA, Inc.
    Inventors: Elie Maalouf, Joseph Staudinger, Don Hayes
  • Publication number: 20200144968
    Abstract: A Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and first and second peaking amplifier dies. The RF signal splitter divides an input RF signal into first, second, and third input RF signals, and conveys the input RF signals to splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier dies each include one or more additional power transistors configured to amplify, along first and second peaking signal paths, the second and third input RF signals to produce amplified second and third RF signals. The dies are coupled to the substrate so that the RF signal paths through the carrier and one or more of the peaking amplifier dies extend in substantially different (e.g., orthogonal) directions.
    Type: Application
    Filed: January 7, 2020
    Publication date: May 7, 2020
    Inventors: Elie A. Maalouf, Margaret A. Szymanowski
  • Patent number: 10608595
    Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that automatically sets a bias voltage of a power amplifier device by monitoring a reference device that is in a scaled relationship with the power amplifier device, and integrally is formed with the power amplifier device on a same semiconductor die. The bias controller can compare a voltage at an input to the reference device to a reference voltage, and then adjust a voltage at a control input of the reference device to a stabilized voltage that induces the reference device to drive the voltage at the input to the reference device equal to the reference voltage. Finally, the bias controller can transform, based on the scaled relationship, the stabilized voltage into a bias voltage applied to a control input of the power amplifier device.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 31, 2020
    Assignee: NXP USA, Inc.
    Inventors: Elie Maalouf, Joseph Staudinger, Don Hayes
  • Publication number: 20200099345
    Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that automatically sets a bias voltage of a power amplifier device by monitoring a reference device that is in a scaled relationship with the power amplifier device, and integrally is formed with the power amplifier device on a same semiconductor die. The bias controller can compare a voltage at an input to the reference device to a reference voltage, and then adjust a voltage at a control input of the reference device to a stabilized voltage that induces the reference device to drive the voltage at the input to the reference device equal to the reference voltage. Finally, the bias controller can transform, based on the scaled relationship, the stabilized voltage into a bias voltage applied to a control input of the power amplifier device.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Elie Maalouf, Joseph Staudinger, Don Hayes
  • Publication number: 20200099344
    Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that enables fast switching between an on state bias voltage and an off state bias voltage for the power amplifier. The bias controller can transition a low impedance switch to an on state to electrically couple a first electrode of a charge holding capacitor to an input of the power amplifier. The charge holding capacitor can be pre charged with the on state bias voltage to quickly provide the on state bias voltage to the power amplifier. The bias controller can also transition the low impedance switch to an off state to couple the input of the power amplifier to the off state bias voltage.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Elie Maalouf, Joseph Staudinger, Don Hayes
  • Patent number: 10566935
    Abstract: An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: February 18, 2020
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Margaret A. Szymanowski
  • Patent number: 10485091
    Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: November 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Jaynal A. Molla, Lakshminarayan Viswanathan, Elie A. Maalouf, Geoffrey Tucker
  • Patent number: 10440813
    Abstract: High thermal performance microelectronic modules containing thermal extension levels are provided, as are methods for fabricating such microelectronic modules. In various embodiments, the microelectronic module includes a module substrate having a substrate frontside and a substrate backside. At least one a microelectronic device, such as a semiconductor die bearing radio frequency circuitry, is mounted to the substrate frontside. A substrate-embedded heat spreader, which is thermally coupled to the microelectronic device, is at least partially contained within the module substrate, and extends to the substrate backside. A thermal extension level is located adjacent the substrate backside and extends away from the substrate backside to terminate at a module mount plane. The thermal extension level contains a heat spreader extension, which is bonded to and in thermal communication with the substrate-embedded heat spreader.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 8, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lu Li, Elie A. Maalouf, Lakshminarayan Viswanathan, Mahesh K. Shah
  • Patent number: 10381984
    Abstract: A Doherty amplifier module includes first and second amplifier die. The first amplifier die includes one or more first power transistors configured to amplify, along a first signal path, a first input RF signal to produce an amplified first RF signal. The second amplifier die includes one or more second power transistors configured to amplify, along a second signal path, a second input RF signal to produce an amplified second RF signal. A phase shift and impedance inversion element is coupled between the outputs of the first and second amplifier die. A shunt circuit is coupled to the output of either or both of the first and/or second amplifier die. The shunt circuit includes a series coupled inductance and high-Q capacitor (e.g., a metal-insulator-metal (MIM) capacitor), and the shunt circuit is configured to at least partially resonate out the output capacitance of the amplifier die to which it is connected.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 13, 2019
    Assignee: NXP USA, Inc.
    Inventors: Yu-Ting David Wu, Enver Krvavac, Joseph Gerard Schultz, Nick Yang, Damon G. Holmes, Shishir Ramasare Shukla, Jeffrey Kevin Jones, Elie A. Maalouf, Mario Bokatius
  • Publication number: 20190098743
    Abstract: High thermal performance microelectronic modules containing sinter-bonded heat dissipation structures are provided, as are methods for the fabrication thereof. In various embodiments, the method includes the steps or processes of providing a module substrate, such as a circuit board, including a cavity having metallized sidewalls. A sinter-bonded heat dissipation structure is formed within the cavity. The sintered-bonded heat dissipation structure is formed, at least in part, by inserting a prefabricated thermally-conductive body, such as a metallic (e.g., copper) coin into the cavity. A sinter precursor material (e.g., a metal particle-containing paste) is dispensed or otherwise applied into the cavity and onto surfaces of the prefabricated thermally-conductive body before, after, or concurrent with insertion of the prefabricated thermally-conductive body.
    Type: Application
    Filed: November 28, 2018
    Publication date: March 28, 2019
    Applicant: NXP USA, INC.
    Inventors: JAYNAL A. MOLLA, LAKSHMINARAYAN VISWANATHAN, ELIE A. MAALOUF, GEOFFREY TUCKER