Patents by Inventor Eliot Broadbent

Eliot Broadbent has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8883640
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: November 11, 2014
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 8450210
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 8026174
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: September 27, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 7189647
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: March 13, 2007
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Publication number: 20050282371
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Application
    Filed: October 24, 2003
    Publication date: December 22, 2005
    Inventors: Evan Patton, Theodore Cacouris, Eliot Broadbent, Steven Mayer