Abstract: The invention relates to a nanoplasma switch device, comprising: —multiple electrically isolated electrodes; —a gap separating the two electrodes; wherein the gap has a width which is dimensioned to effect the generation of a plasma by electric-field electron emission.

Abstract: Electronic metadevice comprising a conductive channel; a metal layer superposed on the conductive channel; and a barrier layer located between the metal layer and the conductive channel. The metal layer includes at least one recess extending through the metal layer to define at least one metallic metastructure comprising at least one first metal layer portion adjacent to at least one second metal layer portion. The recess extends through the metal layer to define a micro-structured or a nano-structured first metal layer portion comprising at least one first metallic extension or finger extending away from a first support of the first metal layer portion towards the second metal layer portion; and a micro-structured or a nano-structured at least one second metal layer portion comprising at least one second metallic extension or finger extending away from a second support of the second metal layer portion towards the first metal layer portion.

Abstract: The present invention concerns a diamond device or structure comprising at least one supporting layer or material including at least one or a plurality of support structures inside the at least one supporting layer or material; a plurality of recesses defined by the at least one or the plurality of support structures; and at least one diamond micro-seed and a plurality of diamond nano-seeds located in each recess or in the plurality of recesses.

Abstract: The invention relates to a nanoplasma switch device, comprising: —multiple electrically isolated electrodes; —a gap separating the two electrodes; wherein the gap has a width which is dimensioned to effect the generation of a plasma by electric-field electron emission.

Abstract: The present invention relates to a method for fabricating an integrated electronic device with a microchannel, comprising the steps of: —Providing a homogeneous or heterogeneous substrate with one or more layers of material, respectively; —Forming at least one trench in the upper surface and through the upper layer using an etching process, particularly using a high aspect ratio etching process; —Sealing the trench by closing the opening of the trench on an upper surface of the upper layer.

Abstract: The present invention relates to a Semiconductor device including a first electrode, a second electrode and at least one semiconductor material or layer between the first and second electrode. The semiconductor device further includes at least one field plate structure for increasing a breakdown voltage of the semiconductor device. The at least one field plate structure comprises at least two recesses in the at least one semiconductor material or layer, the at least two recesses defining a semiconductor region therebetween, and a third electrode contacting or provided on the semiconductor region.

Abstract: The present invention relates, for example, to a semiconductor structure containing multiple parallel channels in which several parallel conductive channels are formed within the semiconductor structure. Electric contact or electrostatic control over all these channels is done by three-dimensional electrode structures. The multiple channel structure with three-dimensional electrodes can be applied to semiconductors devices such as field effect transistors, diodes, and other similar electronic or quantum-effect devices. This structure is practical for materials where multiple parallel conduction channels can be formed, such as in III-V semiconductors. Ill-Nitride semiconductors with such structures are described which can lead to increased power density, reduced on-resistance and improved device performance, in addition to reducing dynamic on-resistance, and improving the stability of their threshold voltage and reliability.

Abstract: The present invention relates, for example, to a semiconductor structure containing multiple parallel channels in which several parallel conductive channels are formed within the semiconductor structure. Electric contact or electrostatic control over all these channels is done by three-dimensional electrode structures. The multiple channel structure with three-dimensional electrodes can be applied to semiconductors devices such as field effect transistors, diodes, and other similar electronic or quantum-effect devices. This structure is practical for materials where multiple parallel conduction channels can be formed, such as in III-V semiconductors. Ill-Nitride semiconductors with such structures are described which can lead to increased power density, reduced on-resistance and improved device performance, in addition to reducing dynamic on-resistance, and improving the stability of their threshold voltage and reliability.

Abstract: The present invention relates to a Semiconductor device including a first electrode, a second electrode and at least one semiconductor material or layer between the first and second electrode. The semiconductor device further includes at least one field plate structure for increasing a breakdown voltage of the semiconductor device. The at least one field plate structure comprises at least two recesses in the at least one semiconductor material or layer, the at least two recesses defining a semiconductor region therebetween, and a third electrode contacting or provided on the semiconductor region.

Abstract: A semiconductor device includes a first region having a first semiconductor material and a second region having a second semiconductor material. The second region is formed over the first region. The semiconductor device also includes a current blocking structure formed in the first region between first and second terminals of the semiconductor device. The current blocking structure is configured to reduce current flow in the first region between the first and second terminals.

Abstract: An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Abstract: An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Abstract: An electrode structure is described in which conductive regions are recessed into a semiconductor region. Trenches may be formed in a semiconductor region, such that conductive regions can be formed in the trenches. The electrode structure may be used in semiconductor devices such as field effect transistors or diodes. Nitride-based power semiconductor devices are described including such an electrode structure, which can reduce leakage current and otherwise improve performance.

Abstract: A method of fabricating optoelectronic devices with embedded void-gap structures on semiconductor layers through bonding is provided. The embedded void-gaps are fabricated on a semiconductor structure by bonding a patterned layer or slab onto a flat surface, or by bonding a flat layer or slab onto a patterned surface. The void-gaps can be filled with air, gases, conductive or dielectric materials, or other substances, in order to provide better isolation of optical modes from dissipative regions, or better light extraction properties.

Abstract: An optoelectronic structure, and method of fabricating same, comprised of semiconductors having growth-embedded void-gap gratings or photonic crystals in one or two dimensions, which are optimized to yield high interaction of the guided light and the photonic crystals and planar epitaxial growth. Such structure can be applied to increase light extraction efficiency in LEDs, increase modal confinement in lasers or increase light absorption in solar cells. The optimal dimensions of the growth-embedded void-gap gratings or photonic crystals are calculated by numerical simulation using scattering matrix formalism. The growth-embedded void-gap gratings are applicable to any semiconductor device, as well as optoelectronic devices, such as light-emitting diodes, laser diodes and solar cells.