Abstract: An insulating container having a base and a lid is provided. The lid may be rotatable about a hinge from a closed configuration to an open configuration and may be secured, via one or more latching devices, in the closed configuration. In some examples, the insulating container further includes a pull handle assembly with a telescopic three-stage arm configuration defined by a stowed configuration, a partially extended configuration, and a fully extended configuration. In other examples, the insulating container further includes a wheel assembly with a pair of wheels mounted with one or two axles, and further including a wheel grommet for absorbing shock and cushioning the axle. In still other examples, the insulating container further includes a drain plug assembly on the rear sidewall adjacent to the bottom portion of the base, the drain plug assembly comprising a main tube that cooperatively engages with an outer tube with a plurality of ratchet teeth that engage one or more ratchet keys on the main tube.

Abstract: Asphaltene onset pressure of a formation fluid is determined by subjecting the fluid to a plurality of tests where depressurization is conducted at a different depressurization rate for each test while optically monitoring the fluid for asphaltene flocculation. The pressures at which asphaltene flocculation are detected in each test are fit to a curve as a function of depressurization rate, and the curve is extrapolated to a pressure (e.g., 0 psi) to provide the asphaltene onset pressure.

Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.

Abstract: The present disclosure relates to a method of forming a tapered optical fiber, where the optical fiber has a cladding encasing a core and has an initial outer diameter. The method involves applying opposing forces to spaced apart sections of the optical fiber. The spaced apart sections define a length portion representing a waist region. While applying the opposing forces, simultaneously applying heat to the waist region to gradually produce a taper of the optical fiber within the waist region. The taper has a first diameter at a midpoint of the waist region which is less than the initial outer diameter. An etch operation is then performed by chemically etching at least a subportion of the waist region of the optical fiber to reduce the subportion to a second diameter which is less than the first diameter.

Abstract: A one-piece package or container is disclosed that includes an opening device in conjunction with a self-closing valve for facilitating opening of the package and for dispensing fluids in a controlled manner. In one embodiment, the opening device can include at least one breachable bubble. The at least one breachable bubble can be formed by a seal along a perimeter and/or fluid channel of the package. The package includes a fluid channel with a self-closing valve that can be opened by breaching the breachable bubble. After the package is opened, the self-closing valve prevents fluid from flowing through the fluid channel until pressure is applied to the package, such as pressure through squeezing . Thus, when a user applies pressure to the package, the contents of the package can be dispensed through the fluid channel in a controlled manner.

Abstract: The present disclosure relates to a method of forming a tapered optical fiber, where the optical fiber has a cladding encasing a core and has an initial outer diameter. The method involves applying opposing forces to spaced apart sections of the optical fiber. The spaced apart sections define a length portion representing a waist region. While applying the opposing forces, simultaneously applying heat to the waist region to gradually produce a taper of the optical fiber within the waist region. The taper has a first diameter at a midpoint of the waist region which is less than the initial outer diameter. An etch operation is then performed by chemically etching at least a subportion of the waist region of the optical fiber to reduce the subportion to a second diameter which is less than the first diameter.

Abstract: An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.

Abstract: In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three dimensional (3D) structures in the layer, forming a second region in at least one vertical sidewall of each 3D structure, and forming an isolation region between the 3D structures. In another embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of 3D structures above the substrate, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of three dimensional (3D) structures above the substrate, a gate region, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure. The gate region is present on a portion of an upper surface of the second region and the gate region is coupled to a portion of the at least one vertical sidewall of each 3D structure.

Abstract: According to one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a semiconductor material; an array of three dimensional (3D) structures above the substrate; and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, where the second region includes a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, a product includes a structure comprising a material of a Group-III-nitride having a dopant, where a concentration of the dopant in the structure has a concentration gradient characteristic of diffusion of the dopant inward from at least a portion of a surface of the structure in a direction substantially normal to the portion of the surface. The structure has less than 1% decomposition of the Group-III-nitride at the surface of the structure.

Abstract: According to one embodiment, an apparatus includes a substrate, and at least one three dimensional (3D) structure above the substrate. The substrate and the 3D structure each include a semiconductor material. The 3D structure also includes: a first region having a first conductivity type, and a second region coupled to a portion of at least one vertical sidewall of the 3D structure.

Abstract: In one embodiment, a product includes a structure comprising a material of a Group-III-nitride having a dopant, where a concentration of the dopant in the structure has a concentration gradient characteristic of diffusion of the dopant inward from at least a portion of a surface of the structure in a direction substantially normal to the portion of the surface. The structure has less than 1% decomposition of the Group-III-nitride at the surface of the structure.

Abstract: According to one embodiment, a method includes performing a plasma etching process on a masked III-V semiconductor, and forming a passivation layer on etched portions of the III-V semiconductor. The passivation layer includes at least one of a group III element and/or a metal from the following: Ni, Cr, W, Mo, Pt, Pd, Mg, Ti, Zr, Hf, Y, Ta, and Sc.

Abstract: In one embodiment, a method of forming a vertical transistor includes forming a layer comprising a semiconductor material above a substrate, defining three dimensional (3D) structures in the layer, forming a second region in at least one vertical sidewall of each 3D structure, and forming an isolation region between the 3D structures. In another embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate comprising a semiconductor material, an array of 3D structures above the substrate, and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, the second region including a portion of at least one vertical sidewall of the 3D structure.

Abstract: According to one embodiment, an apparatus includes a substrate, and at least one three dimensional (3D) structure above the substrate. The substrate and the 3D structure each include a semiconductor material. The 3D structure also includes: a first region having a first conductivity type, and a second region coupled to a portion of at least one vertical sidewall of the 3D structure.

Abstract: According to one embodiment, an apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a semiconductor material; an array of three dimensional (3D) structures above the substrate; and an isolation region positioned between the 3D structures. Each 3D structure includes the semiconductor material. Each 3D structure also includes a first region having a first conductivity type and a second region having a second conductivity type, where the second region includes a portion of at least one vertical sidewall of the 3D structure.

Abstract: One embodiment provides a body massager with a backrest, a lower torso massager, and an upper torso massager. The upper torso massager extends from the backrest for imparting a massage effect to the upper torso of the user. A biasing member is connected to the backrest and the upper torso massager for urging the upper torso massager into contact with the user. Another embodiment provides a body massager with a housing having a first guide oriented generally in a longitudinal direction of the housing. A carriage cooperates with the guide for limited longitudinal translation. A motor translates the carriage along the guide. A second guide is canted relative to a longitudinal direction of the housing. A massage member is supported on the carriage and cooperates with the second guide such that as the carriage is translated along the guide, the massage member is translated transversely relative to the carriage.

Abstract: A portable charger is provided. The portable charging includes a housing and a power source located in the housing so that that the power source can be inductively recharging through the housing. The portable charger also includes a first output connector coupled to the power source for charging a first electronic device, as well as a second output connector coupled to the power source that is different from the first output connector for charging a second electronic device. The first output connector and the second output connector are configured to be at least partially stored within the housing in order to minimize size of the charger.

Abstract: A body massager is provided with a housing. A carriage translates in an upper torso region of the housing. A first massager on the carriage extends in a forward direction from the housing. A second motor-driven massager is mounted to the housing at a lower torso region and extends in the forward direction from the housing further than the first motor-driven massager. Another body massager provides a guide with a longitudinal region and a transverse region. Another body massager provides a suspension on the carriage. Another body massager provides a plate on the carriage for supporting a massage member. An actuator is mounted to the carriage for adjusting the plate. Another body massager provides a contoured guide with an actuator for adjusting the guide. Another body massager provides a transversely contoured guide. Another body massager provides a contoured guide that extends forward in upper and lower torso regions.