Abstract: The present invention provides a computer implemented method, data processing system, and computer program product for verifying a return address. A computer stores the return address into a stack based on a function call. The computer generates a first hash based on a first stack frame and a second stack frame. The computer stores the first hash in a first canary location, wherein the first canary location is in the first stack frame. The computer executes at least one instruction of a routine referenced by the function call. The computer reads the first canary location to form a first suspect hash. The computer calculates a first verification hash based on the first stack frame and the second stack frame. The computer determines that the first verification hash matches the first suspect hash to form a first positive determination. The computer responsive to the first positive determination, the computer reads a second canary location to form a second suspect hash.

Abstract: Mechanisms are disclosed for adjusting a fast re-transmit threshold (FRT) value for transmitting data streams over a computer system. One embodiment includes receiving, by a sender, a current fast re-transmit threshold value for a packet from a receiver. Further, these mechanisms include decreasing the size of the congestion window of the sender, and re-transmitting the packet to the receiver in network communication with the sender. Further still, the mechanisms include counting, by the sender, a number of dupacks after re-transmitting the packet until arrival, at the sender, of an acknowledgement (ACK) for the packet. Yet further, the mechanisms include determining, based on the size of the congestion window and the counting, a value of the FRT value. If the sender receives the ACK for the packet in less than one round trip time, then this may be a re-ordering problem for re-setting the FRT value.

Abstract: A host enables any adapter of multiple adapters of the host to concurrently support any VIPA of the multiple VIPAs assigned to the host. Responsive to a failure of at least one particular adapter from among the multiple adapters, the host triggers the remaining, functioning adapters to broadcast a separate hardware address update for each VIPA over the network, such that for a failover in the host supporting the multiple VIPAs the host directs at least one other host accessible via the network to address any new packets for the multiple VIPAs to one of the separate hardware addresses of one of the remaining adapters.

Abstract: Methods, systems, and media are disclosed for adjusting a fast re-transmit threshold (FRT) value for transmitting data streams over a computer system. One embodiment includes receiving, by a sender, a current fast re-transmit threshold value for a packet from a receiver. Further, the method includes decreasing the size of the congestion window of the sender, and re-transmitting the packet to the receiver in network communication with the sender. Further still, the method includes counting, by the sender, a number of dupacks after re-transmitting the packet until arrival, at the sender, of an acknowledgement (ACK) for the packet. Yet further, the method includes determining, based on the size of the congestion window and the counting, a value of the FRT value. If the sender receives the ACK for the packet in less than one round trip time, then this may be a re-ordering problem for re-setting the FRT value.

Abstract: A host enables any adapter of multiple adapters of the host to concurrently support any VIPA of the multiple VIPAs assigned to the host. Responsive to a failure of at least one particular adapter from among the multiple adapters, the host triggers the remaining, functioning adapters to broadcast a separate hardware address update for each VIPA over the network, such that for a failover in the host supporting the multiple VIPAs the host directs at least one other host accessible via the network to address any new packets for the multiple VIPAs to one of the separate hardware addresses of one of the remaining adapters.

Abstract: The present invention provides a computer implemented method, data processing system, and computer program product for verifying a return address. A computer stores the return address into a stack based on a function call. The computer generates a first hash based on a first stack frame and a second stack frame. The computer stores the first hash in a first canary location, wherein the first canary location is in the first stack frame. The computer executes at least one instruction of a routine referenced by the function call. The computer reads the first canary location to form a first suspect hash. The computer calculates a first verification hash based on the first stack frame and the second stack frame. The computer determines that the first verification hash matches the first suspect hash to form a first positive determination. The computer responsive to the first positive determination, the computer reads a second canary location to form a second suspect hash.