Patents by Inventor Elizabeth Kho Ching Tee

Elizabeth Kho Ching Tee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 10529866
    Abstract: An SOI or PSOI device including a device structure having a plurality of doped semiconductor regions. One or more of the doped semiconductor regions is in electrical communication with one or more electrical terminals. The device further includes an insulator layer located between a bottom surface of the device structure and a handle wafer. The device has an insulator trench structure located between a side surface of the device structure and a lateral semiconductor region located laterally with respect to the device structure. The insulator layer and the insulator trench structure are configured to insulate the device structure from the handle wafer and the lateral semiconductor region, and the insulator trench structure includes a plurality of insulator trenches.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: January 7, 2020
    Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBH
    Inventors: Elizabeth Kho Ching Tee, Alexander Dietrich Holke, Steven John Pilkington, Deb Kumar Pal
  • Semiconductor device
    Patent number: 8970016
    Abstract: A semiconductor device including a p or p+ doped portion and an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion. The device further includes at least one termination portion provided adjacent to the drift portion. The at least one termination portion comprises a Super Junction structure.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: March 3, 2015
    Assignee: X-FAB Semiconductor Foundries AG
    Inventors: Marina Antoniou, Florin Udrea, Elizabeth Kho Ching Tee, Steven John Pilkington, Deb Kumar Pal, Alexander Dietrich Hölke
  • SEMICONDUCTOR DEVICE
    Publication number: 20130320511
    Abstract: A semiconductor device including a p or p+ doped portion and an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion. The device further includes at least one termination portion provided adjacent to the drift portion. The at least one termination portion comprises a Super Junction structure.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 5, 2013
    Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AG
    Inventors: Elizabeth Kho Ching Tee, Alexander Dietrich Hölke, Steven John Pilkington, Deb Kumar Pal, Marina Antoniou, Florin Udrea
  • SEMICONDUCTOR DEVICE
    Publication number: 20130320485
    Abstract: An SOI or PSOI device including a device structure having a plurality of doped semiconductor regions. One or more of the doped semiconductor regions is in electrical communication with one or more electrical terminals. The device further includes an insulator layer located between a bottom surface of the device structure and a handle wafer. The device has an insulator trench structure located between a side surface of the device structure and a lateral semiconductor region located laterally with respect to the device structure. The insulator layer and the insulator trench structure are configured to insulate the device structure from the handle wafer and the lateral semiconductor region, and the insulator trench structure includes a plurality of insulator trenches.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 5, 2013
    Applicant: X-FAB SEMICONDUCTOR FOUNDRIES AG
    Inventors: Elizabeth Kho Ching Tee, Alexander Dietrich Hölke, Steven John Pilkington, Deb Kumar Pal