Abstract: A non-volatile memory based storage system capable of directly overwriting without using redundancy and its writing method are provided. The invention first writes data into a register. Then, a portion of MCF information of the decoded logical writing destination address is taken as a physical writing address and used to determine whether there is data in a block corresponding to the physical writing address. If yes, a new swap block is taken out from a swap table and at least one record of data in the register is written into the swap block.

Abstract: An electronic card with dynamic memory allocation management is provided, which requires only one single memory by utilizing a dynamic memory controller having a selector and a first, a second and a third base registers. A first DMA controller provides an output address added to the first base register for performing data access. A micro-controller provides an output address added to the second base register for performing data access. A second DMA controller provides an output address added to the third base register for performing data access. When the micro-controller, the first DMA controller or the second DMA controller issues an access request to the memory, the dynamic memory controller selects one of the micro-controller, and the first and second DMA controllers to access the memory based on a sequence of the access requests.

Abstract: A non-volatile memory based storage system capable of directly overwriting without using redundancy and its writing method are provided. The invention first writes data into a register. Then, a portion of MCF information of the decoded logical writing destination address is taken as a physical writing address and used to determine whether there is data in a block corresponding to the physical writing address. If yes, a new swap block is taken out from a swap table and at least one record of data in the register is written into the swap block.

Abstract: An electronic card with dynamic memory allocation management is provided, which requires only one single memory by utilizing a dynamic memory controller having a selector and a first, a second and a third base registers. A first DMA controller provides an output address added to the first base register for performing data access. A micro-controller provides an output address added to the second base register for performing data access. A second DMA controller provides an output address added to the third base register for performing data access. When the micro-controller, the first DMA controller or the second DMA controller issues an access request to the memory, the dynamic memory controller selects one of the micro-controller, and the first and second DMA controllers to access the memory based on a sequence of the access requests.