Abstract: A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elem

Abstract: A process for producing a component includes a structure made of III-V material(s) on the surface of a substrate, the structure comprising at least one upper contact level defined on the surface of a first III-V material and a lower contact level defined on the surface of a second III-V material, comprising: successive operations of encapsulation of the structure with at least one dielectric; making primary apertures in a dielectric for the two contacts; making secondary apertures in a dielectric for the two contacts; at least partial filling of the apertures with at least one metallic material so as to produce upper contact bottom metallization and at least one upper contact pad in contact with the metallization for each of said contacts. A component produced by the process is also provided. The component may be a laser diode.

Abstract: A process for producing a component includes a structure made of III-V material(s) on the surface of a substrate, the structure comprising at least one upper contact level defined on the surface of a first III-V material and a lower contact level defined on the surface of a second III-V material, comprising: successive operations of encapsulation of the structure with at least one dielectric; making primary apertures in a dielectric for the two contacts; making secondary apertures in a dielectric for the two contacts; at least partial filling of the apertures with at least one metallic material so as to produce upper contact bottom metallization and at least one upper contact pad in contact with the metallization for each of said contacts. A component produced by the process is also provided. The component may be a laser diode.

Abstract: A production of contact zones for a transistor device including the steps of: a) forming at least one layer made of a compound based on semiconductor and metal on one or more first semiconductor region(s) of a first N-type transistor and on one or more second semiconductor region(s) of a second P-type transistor resting on a same substrate, the first regions being based on a III-V type material whereas the second semiconductor regions are based on another material different from the III-V material, the semiconductor of the compound being an N-type dopant of the III-V material, b) carrying out at least one thermal annealing so as to form on the first semiconductor regions first contact zones and on the second semiconductor regions second contact zones based on a semiconductor and metal compound while increasing the N-doping of the III-V material.

Abstract: A process for fabricating a heterostructure includes at least one elementary structure made of III-V material on the surface of a silicon-based substrate successively comprising: producing a first pattern having at least a first opening in a dielectric material on the surface of a first silicon-based substrate; a first operation for epitaxy of at least one III-V material so as to define at least one elementary base layer made of III-V material in the at least first opening; producing a second pattern in a dielectric material so as to define at least a second opening having an overlap with the elementary base layer; a second operation for epitaxy of at least one III-V material on the surface of at least the elementary base layer made of III-V material(s) so as to produce the at least elementary structure made of III-V material(s) having an outer face; an operation for transferring and assembling the at least photonic active elementary structure via its outer face, on an interface that may comprise passive elem

Abstract: A production of contact zones for a transistor device including the steps of: a) forming at least one layer made of a compound based on semiconductor and metal on one or more first semiconductor region(s) of a first N-type transistor and on one or more second semiconductor region(s) of a second P-type transistor resting on a same substrate, the first regions being based on a III-V type material whereas the second semiconductor regions are based on another material different from the III-V material, the semiconductor of the compound being an N-type dopant of the III-V material, b) carrying out at least one thermal annealing so as to form on the first semiconductor regions first contact zones and on the second semiconductor regions second contact zones based on a semiconductor and metal compound while increasing the N-doping of the III-V material.