Abstract: Embodiments of transceivers with one or more reconfigurable antennas are described. In one embodiment, a reconfigurable antenna transceiver includes a transmit chain, a receive chain, and a reconfigurable antenna having a plurality of reconfigurable modes. The transceiver may also include an antenna controller configured to set a mode of the reconfigurable antenna. According to other aspects, the transceiver may also include a signal processor configured to transmit a set of training symbols during a training interval. The antenna controller may be further configured to select a respective mode of the reconfigurable antenna for each training symbol in the set of training symbols. Additionally, the antenna controller may be configured to calculate a received Signal-of-Interest to Interferer Ratio (SIR) for each training symbol of the set of training symbols. In this context, a system utilizing a reconfigurable antenna may achieve significant rate improvement compared to half-duplex systems.

Abstract: Embodiments of full-duplex self-interference cancellation systems are described. In one embodiment, a full-duplex transceiver includes a digital signal processor that processes digital signals, a transmit chain that receives a first digital baseband signal from the digital signal processor and converts it to a first RF signal, a receive chain that receives a second RF signal and converts the second RF signal to a second digital baseband signal, and an auxiliary receive chain that receives a portion of the first RF signal and converts it to an auxiliary digital baseband signal. The transceiver may further include a self-interference canceller that applies a channel transfer function to the auxiliary digital baseband signal to generate a cancellation signal and subtracts the cancellation signal from the second digital baseband signal to cancel self-interference at the transceiver.

Abstract: Embodiments of transceivers with one or more reconfigurable antennas are described. In one embodiment, a reconfigurable antenna transceiver includes a transmit chain, a receive chain, and a reconfigurable antenna having a plurality of reconfigurable modes. The transceiver may also include an antenna controller configured to set a mode of the reconfigurable antenna. According to other aspects, the transceiver may also include a signal processor configured to transmit a set of training symbols during a training interval. The antenna controller may be further configured to select a respective mode of the reconfigurable antenna for each training symbol in the set of training symbols. Additionally, the antenna controller may be configured to calculate a received Signal-of-Interest to Interferer Ratio (SIR) for each training symbol of the set of training symbols. In this context, a system utilizing a reconfigurable antenna may achieve significant rate improvement compared to half-duplex systems.

Abstract: Embodiments of full-duplex self-interference cancellation systems are described. In one embodiment, a full-duplex transceiver includes a digital signal processor that processes digital signals, a transmit chain that receives a first digital baseband signal from the digital signal processor and converts it to a first RF signal, a receive chain that receives a second RF signal and converts the second RF signal to a second digital baseband signal, and an auxiliary receive chain that receives a portion of the first RF signal and converts it to an auxiliary digital baseband signal. The transceiver may further include a self-interference canceller that applies a channel transfer function to the auxiliary digital baseband signal to generate a cancellation signal and subtracts the cancellation signal from the second digital baseband signal to cancel self-interference at the transceiver.

Abstract: Embodiments of full-duplex systems with reconfigurable antennas are described. In one embodiment, a full-duplex reconfigurable antenna transceiver includes a transmit chain, a receive chain, and a reconfigurable antenna having a plurality of reconfigurable modes. The transceiver may also include an antenna controller configured to set a mode of the reconfigurable antenna. According to other aspects, the transceiver may also include a signal processor configured to transmit a set of training symbols during a training interval. The antenna controller may be further configured to select a respective mode of the reconfigurable antenna for each training symbol in the set of training symbols. Additionally, the antenna controller may be configured to calculate a received Signal-of-Interest to Interferer Ratio (SIR) for each training symbol of the set of training symbols. In this context, a full-duplex system utilizing a reconfigurable antenna may achieve significant rate improvement compared to half-duplex systems.

Abstract: Embodiments of full-duplex self-interference cancellation systems are described. In one embodiment, a full-duplex transceiver includes a digital signal processor that processes digital signals, a transmit chain that receives a first digital baseband signal from the digital signal processor and converts it to a first RF signal, a receive chain that receives a second RF signal and converts the second RF signal to a second digital baseband signal, and an auxiliary receive chain that receives a portion of the first RF signal and converts it to an auxiliary digital baseband signal. The transceiver may further include a self-interference canceller that applies a channel transfer function to the auxiliary digital baseband signal to generate a cancellation signal and subtracts the cancellation signal from the second digital baseband signal to cancel self-interference at the transceiver.

Abstract: Embodiments of full-duplex systems with reconfigurable antennas are described. In one embodiment, a full-duplex reconfigurable antenna transceiver includes a transmit chain, a receive chain, and a reconfigurable antenna having a plurality of reconfigurable modes. The transceiver may also include an antenna controller configured to set a mode of the reconfigurable antenna. According to other aspects, the transceiver may also include a signal processor configured to transmit a set of training symbols during a training interval. The antenna controller may be further configured to select a respective mode of the reconfigurable antenna for each training symbol in the set of training symbols. Additionally, the antenna controller may be configured to calculate a received Signal-of-Interest to Interferer Ratio (SIR) for each training symbol of the set of training symbols. In this context, a full-duplex system utilizing a reconfigurable antenna may achieve significant rate improvement compared to half-duplex systems.

Abstract: Embodiments of full-duplex self-interference cancellation systems are described. In one embodiment, a full-duplex transceiver includes a digital signal processor that processes digital signals, a transmit chain that receives a first digital baseband signal from the digital signal processor and converts it to a first RF signal, a receive chain that receives a second RF signal and converts the second RF signal to a second digital baseband signal, and an auxiliary receive chain that receives a portion of the first RF signal and converts it to an auxiliary digital baseband signal. The transceiver may further include a self-interference canceller that applies a channel transfer function to the auxiliary digital baseband signal to generate a cancellation signal and subtracts the cancellation signal from the second digital baseband signal to cancel self-interference at the transceiver.