Abstract: A semiconductor monolithic integrated circuit comprising circuit elements built into isolated epitaxial layer islands is described. The isolation is accomplished by part by a p-n junction between the epitaxial layer and its substrate, in part by an insulated zone of converted epitaxial material sunken only part way through the layer, and in part by a depletion layer or buried zone of the substrate conductivity type.

Abstract: The invention relates to a method of manufacturing a semiconductor device in which a surface of a silicon semiconductor region covered at least partly with a silicon oxide-containing layer is subjected to a nitridation treatment forming a buried zone of a nitrogen-containing material between the silicon oxide layer and the silicon region, which zone is used in a further phase of the manufacture or in the manufactured semiconductor device.

Abstract: In Locos N-channel MOST-IC's underpasses can be obtained below the locos pattern by performing, at the area where the underpasses are to be formed, an As or Sb implantation prior to providing the locos. By using the nitride mask as an implantation mask, the locos and the source/drain zones of the transistors can be provided in a self-registering manner with respect to the underpasses.

Abstract: A semiconductor device having a region of a first conductivity type, a semiconductor layer present thereon, a buried layer of the second conductivity type provided locally between the said layer and the region, a buried layer of the first conductivity type provided on said buried layer and an inset pattern of an insulating material which adjoins the buried layer of the second conductivity type and surrounds two islands of the semiconductor layer connected by the buried layer of the first conductivity type in one of which a semiconductor circuit element is provided which is contacted via the other island. Suited in particular for integration of insulated complementary transistor pairs.

Abstract: A method of making a semiconductor device is described in which a selected surface portion of a silicon wafer is masked against oxidation, and then the surface is oxidized to grow a thermal oxide which sinks into the silicon surface at the unmasked areas, with the result that the masked silicon remains as a mesa surrounded by the sunken oxide. Then semiconductor devices can be provided by various techniques in the silicon mesa. The advantages include the provision of flat junctions, as distinguished from dish junctions in the prior art, reduced capacitance resulting from the extension of the device interconnections over the silicon wafer, and a flatter surface on top of the wafer reducing the risk of damage to the deposited interconnections.

Abstract: An oxide-isolated, vertical bipolar transistor integrated circuit provided with a channel stop preventing inversion of the base region of the transistors and serving as a channel stop between buried isolation junctions, the channel stop bordering the whole of the oxide isolation.

Abstract: Method of making an insulated gate field effect transistor is described in which the surface of a silicon semiconductor is covered in whole or in part with a layer of a masking material which masks against oxidation, such as silicon nitride. Areas of the silicon surface are exposed for the source and drain regions, leaving the oxidation mask over the future channel. When the source and drain regions have been made, as for example by diffusion, the device is subjected to oxidation, causing the growth of a thick oxide which sinks into the silicon surface where it is not masked by the oxidation mask. Among the advantages obtained are fewer precise masking steps, a flatter device surface, and reduced gate overlap of the source and drain.

Abstract: An insulated gate field-effect transistor and a method of making same, in which the channel is provided in a mesa region of a silicon body, and the channel is surrounded by thicker silicon oxide over the adjacent source and drain regions. A thinner insulating layer is over the channel, and a gate electrode on the latter. The manufacturing method involves masking the channel region while growing silicon oxide around it causing the oxide to penetrate into the silicon areas surrounding the channel to provide the channel in a mesa surrounded by the oxide.