Patents by Inventor Emad Samadiani

Emad Samadiani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240347414
    Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.
    Type: Application
    Filed: April 12, 2024
    Publication date: October 17, 2024
    Inventors: Madhusudan K. Iyengar, Christopher Malone, Woon-Seong Kwon, Emad Samadiani, Melanie Beauchemin, Padam Jain, Teckgyu Kang, Yuan Li, Connor Burgess, Norman Paul Jouppi, Nicholas Stevens-Yu, Yingying Wang
  • Patent number: 11990386
    Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: May 21, 2024
    Assignee: Google LLC
    Inventors: Madhusudan K. Iyengar, Christopher Malone, Woon-Seong Kwon, Emad Samadiani, Melanie Beauchemin, Padam Jain, Teckgyu Kang, Yuan Li, Connor Burgess, Norman Paul Jouppi, Nicholas Stevens-Yu, Yingying Wang
  • Publication number: 20240121931
    Abstract: Methods and structures for providing thermal dissipating elements on integrated circuit (“IC”) dies are disclosed. A thermal dissipating element placement assembly, such as a pin fin placement assembly, along with a vacuum pickup assembly, can be used to assist with simultaneous placement of multiple pin fins with desired profiles on desired locations of the IC die. The pin fin placement assembly may be comprised of one or more plates with a plurality of apertures therein for receiving the pin fins. The pin fin placement assembly can be further incorporated into a thermal cooling structure, which can include a manifold configured to encase the IC die and attached pin fins.
    Type: Application
    Filed: July 25, 2023
    Publication date: April 11, 2024
    Inventors: Yingshi Tang, Yingying Wang, Padam Jain, Emad Samadiani, Sudharshan Sugavanesh Udhayakumar, Madhusudan K. Iyengar
  • Patent number: 11955406
    Abstract: An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: April 9, 2024
    Assignee: Google LLC
    Inventors: Yingying Wang, Emad Samadiani, Madhusudan K. Iyengar, Padam Jain, Xiaojin Wei, Teckgyu Kang, Sudharshan Sugavanesh Udhayakumar, Yingshi Tang
  • Publication number: 20240055317
    Abstract: A compliant pad spacer utilized in a three-dimensional IC packaging is provided. The compliant pad spacer may be utilized to provide adequate support among the substrates or boards, such as packing substrates, interposers or print circuit broads (PCBs), so as to minimize the effects of substrate warpage or structural collapse in the IC packaging. In one example, the compliant pad spacer includes an insulating material, such as silicon-based polymer composites having ceramic fillers disposed therein.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 15, 2024
    Inventors: Emad Samadiani, Padam Jain, Yingshi Tang, Sue Yun Teng, Nicholas Chao Wei Wong, Kieran Miller, Sudharshan Sugavanesh Udhayakumar
  • Publication number: 20240038620
    Abstract: A pin fin placement assembly utilized to form pin fins in a thermal dissipating feature is provided. The pin fin placement assembly may place the pin fins on an IC die disposed in the IC package. The pin fin placement assembly may assist massively placing the pin fins with desired profiles and numbers on desired locations of the IC die. The plurality of pin fins is formed in a first plurality of apertures in the pin fin placement assembly. A thermal process is then performed to solder the plurality of pin fins on the IC die.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Applicants: Google LLC, Google LLC
    Inventors: Yingshi Tang, Yingying Wang, Padam Jain, Emad Samadiani, Sudharshan Sugavanesh Udhayakumar, Madhusudan K. Iyengar
  • Publication number: 20230260931
    Abstract: A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 17, 2023
    Inventors: Madhusudan K. Iyengar, Connor Burgess, Padam Jain, Emad Samadiani, Yuan Li
  • Patent number: 11721641
    Abstract: A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 8, 2023
    Assignee: Google LLC
    Inventors: Madhusudan K. Iyengar, Connor Burgess, Padam Jain, Emad Samadiani, Yuan Li
  • Patent number: 11664329
    Abstract: A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 30, 2023
    Assignee: Google LLC
    Inventors: Madhusudan K. Iyengar, Connor Burgess, Padam Jain, Emad Samadiani, Yuan Li
  • Publication number: 20210378106
    Abstract: A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 2, 2021
    Inventors: Madhusudan K. Iyengar, Christopher Malone, Woon-Seong Kwon, Emad Samadiani, Melanie Beauchemin, Padam Jain, Teckgyu Kang, Yuan Li, Connor Burgess, Norman Paul Jouppi, Nicholas Stevens-Yu, Yingying Wang
  • Publication number: 20210366841
    Abstract: A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 25, 2021
    Inventors: Madhusudan K. Iyengar, Connor Burgess, Padam Jain, Emad Samadiani, Yuan Li
  • Publication number: 20210366806
    Abstract: Systems and methods for using spring force based compliance to minimize the bypass liquid flow gaps between the tops of chip microfins and bottom side of manifold ports are disclosed herein. A fluid delivery and exhaust manifold structure provides direct liquid cooling of a module. The manifold sits on top of a chip with flow channels. Inlet and outlet channels of the manifold in contact with flow channels of the chip creates an intricate crossflow path for the coolant resulting in improved heat transfer between the chip and the working fluid. The module is also designed with pressure reduction features using internal leakage flow openings to account for pressure differential between fluid entering and being expelled from the module.
    Type: Application
    Filed: May 20, 2020
    Publication date: November 25, 2021
    Inventors: Madhusudan K. Iyengar, Connor Burgess, Emad Samadiani, Padam Jain, Jorge Padilla, Feini Zhang, Yuan Li
  • Patent number: 11051427
    Abstract: A cooling system for an electronic circuit package is provided. The cooling system includes a heat transfer plate positioned in thermal contact with an electronic circuit package surface and forming the bottom surface of an evaporative region of the cooling system. The cooling system also includes a plurality of condensing tubes in fluid communication with, and extending away from, the evaporative region, such that the evaporative region and the condensing tubes together form a single, uninterrupted, sealed enclosure. The cooling system also includes a fluid within the sealed enclosure. The cooling system also includes a plurality of spacers filling gaps between the heat transfer plate and the condensing tubes, such that each spacer is configured as an independent component to allow the passage of fluid through the interior space of each spacer. The cooling system also includes a plurality of wicks, where each wick is positioned partially within a corresponding spacer to which it is fluidically coupled.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: June 29, 2021
    Assignee: Google LLC
    Inventors: Soheil Farshchian, Emad Samadiani
  • Patent number: 11044835
    Abstract: A server tray package includes a motherboard assembly that includes a plurality of data center electronic devices, the plurality of data center electronic devices including at least one heat generating processor device; a vapor chamber mounted on and in conductive thermal contact with the at least one heat generating processor device, the vapor chamber including a housing that defines an inner volume and encloses a working fluid; and a liquid cold plate assembly that includes a top portion mounted to at least one of the vapor chamber or the motherboard assembly and including a heat transfer member that includes an inlet port and an outlet port that are in fluid communication with a cooling liquid flow path defined through the heat transfer member and formed on a top surface of the housing of the vapor chamber.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: June 22, 2021
    Assignee: Google LLC
    Inventors: Jerry Chiu, Gregory P. Imwalle, Emad Samadiani
  • Publication number: 20200315069
    Abstract: A server tray package includes a motherboard assembly that includes a plurality of data center electronic devices, the plurality of data center electronic devices including at least one heat generating processor device; a vapor chamber mounted on and in conductive thermal contact with the at least one heat generating processor device, the vapor chamber including a housing that defines an inner volume and encloses a working fluid; and a liquid cold plate assembly that includes a top portion mounted to at least one of the vapor chamber or the motherboard assembly and including a heat transfer member that includes an inlet port and an outlet port that are in fluid communication with a cooling liquid flow path defined through the heat transfer member and formed on a top surface of the housing of the vapor chamber.
    Type: Application
    Filed: December 6, 2019
    Publication date: October 1, 2020
    Inventors: Jerry Chiu, Gregory P. Imwalle, Emad Samadiani
  • Patent number: 10542641
    Abstract: A data center cooling system includes a thermosiphon, an actuator coupled to the thermosiphon, and a controller. The thermosiphon includes an evaporator; a condenser; and at least one conduit coupled between the evaporator and the condenser to transport a working fluid between the evaporator and the condenser. The controller is coupled to the actuator and configured to operate the actuator to adjust a liquid level of the working fluid in the evaporator based, at least in part, on a parameter associated with a heat load of one or more data center heat generating computing devices.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: January 21, 2020
    Assignee: Google LLC
    Inventors: Emad Samadiani, Eehern J. Wong, Gregory P. Imwalle, Soheil Farshchian
  • Publication number: 20190373770
    Abstract: A cooling system for an electronic circuit package is provided. The cooling system includes a heat transfer plate positioned in thermal contact with an electronic circuit package surface and forming the bottom surface of an evaporative region of the cooling system. The cooling system also includes a plurality of condensing tubes in fluid communication with, and extending away from, the evaporative region, such that the evaporative region and the condensing tubes together form a single, uninterrupted, sealed enclosure. The cooling system also includes a fluid within the sealed enclosure. The cooling system also includes a plurality of spacers filling gaps between the heat transfer plate and the condensing tubes, such that each spacer is configured as an independent component to allow the passage of fluid through the interior space of each spacer. The cooling system also includes a plurality of wicks, where each wick is positioned partially within a corresponding spacer to which it is fluidically coupled.
    Type: Application
    Filed: August 16, 2019
    Publication date: December 5, 2019
    Inventors: Soheil Farshchian, Emad Samadiani
  • Patent number: 10433461
    Abstract: A cooling system for an electronic circuit package is provided. The cooling system includes a heat transfer plate positioned in thermal contact with an electronic circuit package surface and forming the bottom surface of an evaporative region of the cooling system. The cooling system also includes a plurality of condensing tubes in fluid communication with, and extending away from, the evaporative region, such that the evaporative region and the condensing tubes together form a single, uninterrupted, sealed enclosure. The cooling system also includes a fluid within the sealed enclosure. The cooling system also includes a plurality of spacers filling gaps between the heat transfer plate and the condensing tubes, such that each spacer is configured as an independent component to allow the passage of fluid through the interior space of each spacer. The cooling system also includes a plurality of wicks, where each wick is positioned partially within a corresponding spacer to which it is fluidically coupled.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: October 1, 2019
    Assignee: Google LLC
    Inventors: Soheil Farshchian, Emad Samadiani
  • Patent number: 10349561
    Abstract: A data center cooling system includes a modular heat sink and a working fluid. The modular heat sink includes an evaporator configured to thermally contact a heat-generating electronic device to receive heat from the data center heat-generating electronic device; a condenser coupled to the evaporator and configured to transfer the heat from the heat-generating electronic device into a cooling fluid; and a plurality of transport tubes that fluidly couple the evaporator and the condenser, at least one of the plurality of transport tubes including an open end positioned in the evaporator and a closed end positioned in the condenser. The working fluid vaporizes in the evaporator based on receipt of the heat from the heat-generating electronic device, and circulates, in vapor phase, from the evaporator to the condenser in the transport member, and circulates, in liquid phase, from the condenser to the evaporator.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: July 9, 2019
    Assignee: Google LLC
    Inventors: Soheil Farshchian, Emad Samadiani
  • Publication number: 20190132992
    Abstract: A cooling system for an electronic circuit package is provided. The cooling system includes a heat transfer plate positioned in thermal contact with an electronic circuit package surface and forming the bottom surface of an evaporative region of the cooling system. The cooling system also includes a plurality of condensing tubes in fluid communication with, and extending away from, the evaporative region, such that the evaporative region and the condensing tubes together form a single, uninterrupted, sealed enclosure. The cooling system also includes a fluid within the sealed enclosure. The cooling system also includes a plurality of spacers filling gaps between the heat transfer plate and the condensing tubes, such that each spacer is configured as an independent component to allow the passage of fluid through the interior space of each spacer. The cooling system also includes a plurality of wicks, where each wick is positioned partially within a corresponding spacer to which it is fluidically coupled.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Soheil Farshchian, Emad Samadiani