Abstract: Devices and methods are provided in which a driver is supplied via a first current path and a second current path which can comprise a switching element.

Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: A system and method for adapting a width of a clocking pulse for clocking a DC-DC converter, wherein the width of the clocking pulse is selected based upon the duty cycle of the DC-DC converter. When the DC-DC converter operates below a predefined threshold duty cycle, a clocking pulse of a first width is selected to allow operation of the converter at a minimum predefined duty cycle with a clocking frequency that minimizes output voltage ripple. The first width corresponds to an on-time of a switching transistor of the DC-DC converter when the converter is operated at the minimum duty cycle. When the DC-DC converter operates above the predefined threshold duty cycle, a clocking pulse of a second width is selected to allow operation of the converter at high duty cycles while simultaneously avoiding missed inductor current pulses and generation of sub-harmonic voltage oscillations.

Abstract: A system for supplying current to a load is disclosed. One embodiment provides a switching converter for providing a load current to the load. The switching regulator includes a switching circuit. A current control unit generates a modulated current control signal representing a desired load current. The switching circuit is driven dependent on the modulated current control signal. A logic circuit receives a pulse-width-modulated control signal representing a desired dimming ratio and is configured to generate a gate signal for driving the switching circuit dependent on the current control signal during a duty cycle of the pulse-width-modulated control signal. The logic circuit is configured to activate the switching converter, independent on the state of the current control signal, at the beginning of the duty cycle of the pulse-width-modulated control signal.

Abstract: A system for supplying current to a load is disclosed. One embodiment provides a switching converter for providing a load current to the load. The switching regulator includes a switching circuit. A current control unit generates a modulated current control signal representing a desired load current. The switching circuit is driven dependent on the modulated current control signal. A logic circuit receives a pulse-width-modulated control signal representing a desired dimming ratio and is configured to generate a gate signal for driving the switching circuit dependent on the current control signal during a duty cycle of the pulse-width-modulated control signal. The logic circuit is configured to activate the switching converter, independent on the state of the current control signal, at the beginning of the duty cycle of the pulse-width-modulated control signal.

Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.

Abstract: A system and method for adapting a width of a clocking pulse for clocking a DC-DC converter, wherein the width of the clocking pulse is selected based upon the duty cycle of the DC-DC converter. When the DC-DC converter operates below a predefined threshold duty cycle, a clocking pulse of a first width is selected to allow operation of the converter at a minimum predefined duty cycle with a clocking frequency that minimizes output voltage ripple. The first width corresponds to an on-time of a switching transistor of the DC-DC converter when the converter is operated at the minimum duty cycle. When the DC-DC converter operates above the predefined threshold duty cycle, a clocking pulse of a second width is selected to allow operation of the converter at high duty cycles while simultaneously avoiding missed inductor current pulses and generation of sub-harmonic voltage oscillations.

Abstract: A voltage regulator includes a power field effect transistor and a control-loop circuit. The power field effect transistor has a threshold voltage, a drain terminal receiving an input voltage, a source terminal providing an output voltage and a load current, a gate terminal responsive to a control signal, and a bulk terminal. The control-loop circuit is responsive to the output voltage and providing the control signal, and is configured to adjust the control signal to such a value that the output voltage is regulated to a constant value. In addition, the threshold voltage of the power field effect transistor is modified dependent on the load current.

Abstract: One embodiment of the invention relates to a component arrangement including a load and an open-load detector. The load transistor has a first transistor region arranged in a semiconductor body, a second transistor region arranged in the semiconductor body and a third transistor region arranged between the first transistor region and the second transistor region and doped in complementary fashion to the first transistor region and the second transistor region. The open-load detector has a sense region arranged in the third transistor region and of conduction type complementary to the third transistor region and having an evaluation circuit connected to the sense region.

Abstract: A circuit arrangement comprising a high-side semiconductor switch with a first load terminal connected to a first supply terminal receiving an input voltage, a second load terminal connected to an output terminal providing an output signal, and a control terminal, a floating driver circuit connected to the control terminal for driving the semiconductor switch, a level shifter receiving an input signal and providing a floating input signal dependent on the input signal, a floating control logic receiving the output signal and the floating input signal and providing at least one control signal to the floating driver circuit, wherein the floating control logic comprises means for detecting an edge in the output signal and means for generating the control signal dependent on the result of the edge detection.

Abstract: An integrated circuit having a bootstrap charger for using in a switching mode power supply is disclosed. In one embodiment, a capacitor is connected between a floating terminal and a bootstrap supply terminal with a voltage drop over the capacitor, a comparing device with a first input terminal receiving a fraction of the voltage drop, a second input terminal receiving a reference, and an output terminal providing a control signal, and a charge circuit configured to charge the capacitor dependent on the control signal.

Abstract: The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.

Abstract: A circuit arrangement comprising a high-side semiconductor switch with a first load terminal connected to a first supply terminal receiving an input voltage, a second load terminal connected to an output terminal providing an output signal, and a control terminal, a floating driver circuit connected to the control terminal for driving the semiconductor switch, a level shifter receiving an input signal and providing a floating input signal dependent on the input signal, a floating control logic receiving the output signal and the floating input signal and providing at least one control signal to the floating driver circuit, wherein the floating control logic comprises means for detecting an edge in the output signal and means for generating the control signal dependent on the result of the edge detection.

Abstract: A voltage regulator includes a power field effect transistor and a control-loop circuit. The power field effect transistor has a threshold voltage, a drain terminal receiving an input voltage, a source terminal providing an output voltage and a load current, a gate terminal responsive to a control signal, and a bulk terminal. The control-loop circuit is responsive to the output voltage and providing the control signal, and is configured to adjust the control signal to such a value that the output voltage is regulated to a constant value. In addition, the threshold voltage of the power field effect transistor is modified dependent on the load current.

Abstract: The invention relates to a current regulator having the following features: a first semiconductor body (1; 1?) having a first and second terminal contact (11, 12), a transistor (T) having a control terminal and a load path, which is integrated in the semiconductor body (1; 1?) and the load path of which runs between the terminal contacts (11, 12) of the semiconductor body, a current measuring resistor (22), which is at least partly formed by a section of the load path of the transistor, an evaluation and drive circuit (3), which is connected to the current measuring resistor (22) and which is designed to drive the transistor depending on a voltage across the measuring resistor (22).

Abstract: An integrated circuit having a bootstrap charger for using in a switching mode power supply is disclosed. In one embodiment, a capacitor is connected between a floating terminal and a bootstrap supply terminal with a voltage drop over the capacitor, a comparing device with a first input terminal receiving a fraction of the voltage drop, a second input terminal receiving a reference, and an output terminal providing a control signal, and a charge circuit configured to charge the capacitor dependent on the control signal.

Abstract: One embodiment of the invention relates to a component arrangement including a load and an open-load detector. The load transistor has a first transistor region arranged in a semiconductor body, a second transistor region arranged in the semiconductor body and a third transistor region arranged between the first transistor region and the second transistor region and doped in complementary fashion to the first transistor region and the second transistor region. The open-load detector has a sense region arranged in the third transistor region and of conduction type complementary to the third transistor region and having an evaluation circuit connected to the sense region.

Abstract: A circuit arrangement includes a first switch device and at least a second switch device. The first switch device is operably coupled to alternately switch on and off a first operating current to a first light-emitting diode arrangement such that the first light-emitting diode arrangement has a first brightness. The second switch device is operably coupled to alternately switch on and off a second operating current to a second light-emitting diode arrangement such that the second light-emitting diode arrangement has a second brightness. The circuit arrangement further includes a logic device configured to control the first and second switch devices that the first and second switch devices do not both switch on simultaneously.

Abstract: The invention relates to a current regulator having the following features: a first semiconductor body (1; 1?) having a first and second terminal contact (11, 12), a transistor (T) having a control terminal and a load path, which is integrated in the semiconductor body (1; 1?) and the load path of which runs between the terminal contacts (11, 12) of the semiconductor body, a current measuring resistor (22), which is at least partly formed by a section of the load path of the transistor, an evaluation and drive circuit (3), which is connected to the current measuring resistor (22) and which is designed to drive the transistor depending on a voltage across the measuring resistor (22).