Patents by Inventor Emek Yesilada

Emek Yesilada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cell library, integrated circuit, and methods of making same
    Patent number: 8458638
    Abstract: A cell library intended to be used to form an integrated circuit, this library defining a first cell including a first MOS transistor of minimum dimensions, and a second cell including a second MOS transistor of lower leakage current, wherein the second cell takes up the same surface area as the first cell, and the second MOS transistor has a gate of same length as the gate of the first MOS transistor across at least a first width in its central portion, and of greater length across at least a second width on either side of the central portion.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: June 4, 2013
    Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS, Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Olivier Menut, Laurent Bergher, Emek Yesilada, Yorick Trouiller, Franck Foussadier, Raphaël Bingert
  • Simulation of the image projected by a mask
    Patent number: 8423927
    Abstract: The disclosure concerns a method of simulating the image projected by a mask during photolithography including determining by a processor (702), taking into account the thickness of a masking layer of a mask, a near-field transmission amplitude curve of light passing through the mask across at least one pattern boundary in the initial mask layout; calculating by the processor, for each of a plurality of zones, average values of the curve; and simulating by a simulator (708) the image projected by the initial mask layout during the photolithography based on the average values.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: April 16, 2013
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Mazen Saied, Emek Yesilada
  • Cell Library, Integrated Circuit, and Methods of Making Same
    Publication number: 20110298010
    Abstract: A cell library intended to be used to form an integrated circuit, this library defining a first cell including a first MOS transistor of minimum dimensions, and a second cell including a second MOS transistor of lower leakage current, wherein the second cell takes up the same surface area as the first cell, and the second MOS transistor has a gate of same length as the gate of the first MOS transistor across at least a first width in its central portion, and of greater length across at least a second width on either side of the central portion.
    Type: Application
    Filed: February 8, 2011
    Publication date: December 8, 2011
    Applicants: STMicroelectronics SA, Commissariat A L'Energie Atomique Et Aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Olivier Menut, Laurent Bergher, Emek Yesilada, Yorick Trouiller, Franck Foussadier, Raphaël Bingert
  • SIMULATION OF THE IMAGE PROJECTED BY A MASK
    Publication number: 20110022219
    Abstract: The disclosure concerns a method of simulating the image projected by a mask during photolithography including determining by a processor (702), taking into account the thickness of a masking layer of a mask, a near-field transmission amplitude curve of light passing through the mask across at least one pattern boundary in the initial mask layout; calculating by the processor, for each of a plurality of zones, average values of the curve; and simulating by a simulator (708) the image projected by the initial mask layout during the photolithography based on the average values.
    Type: Application
    Filed: July 20, 2010
    Publication date: January 27, 2011
    Inventors: MAZEN SAIED, Emek Yesilada