Patents by Inventor Emeline Souchier

Emeline Souchier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220020816
    Abstract: The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe BOIVIN, Jean Jacques FAGOT, Emmanuel PETITPREZ, Emeline SOUCHIER, Olivier WEBER
  • Patent number: 11152430
    Abstract: The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: October 19, 2021
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: Philippe Boivin, Jean Jacques Fagot, Emmanuel Petitprez, Emeline Souchier, Olivier Weber
  • Publication number: 20190312088
    Abstract: The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.
    Type: Application
    Filed: April 4, 2019
    Publication date: October 10, 2019
    Inventors: Philippe BOIVIN, Jean Jacques FAGOT, Emmanuel PETITPREZ, Emeline SOUCHIER, Olivier WEBER
  • Patent number: 9249495
    Abstract: The invention relates to a method for preparing a thin film of at least one compound of formula AM4X8, where: A is Ga or Ge; M is V, Nb, Ta or Mo; and X is S or Se. Said method includes the following steps: i) a step of forming a thin film of at least one compound of formula AM4X8 by the magnetron spraying of a target including at least one compound of said formula AM4X8, in an atmosphere including at least one inert gas; and ii) a step of annealing the thin film formed during step i) by heat treating; wherein step i) and/or step ii) are carried out in the presence of sulphur when X is S or in the presence of selenium when X is Se.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: February 2, 2016
    Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Marie-Paule Besland, Emeline Souchier, Laurent Carlo, Benoit Corraze, Etienne Janod, Julie Martial
  • Publication number: 20120058283
    Abstract: The invention relates to a method for preparing a thin film of at least one compound of formula AM4X8, where: A is Ga or Ge; M is V, Nb, Ta or Mo; and X is S or Se. Said method includes the following steps: i) a step of forming a thin film of at least one compound of formula AM4X8 by the magnetron spraying of a target including at least one compound of said formula AM4X8, in an atmosphere including at least one inert gas; and ii) a step of annealing the thin film formed during step i) by heat treating; wherein step i) and/or step ii) are carried out in the presence of sulphur when X is S or in the presence of selenium when X is Se.
    Type: Application
    Filed: March 17, 2010
    Publication date: March 8, 2012
    Inventors: Marie-Paule Besland, Emeline Souchier, Laurent Cario, Benoit Corraze, Etienne Janod, Julie Martial