Patents by Inventor Emi Kakisada

Emi Kakisada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEM, PROCESSING DEVICE, AND STORAGE MEDIUM
    Publication number: 20250067842
    Abstract: According to one embodiment, a system includes a sensor in which at least one of an installation location and a configuration is changeable, a controller for driving the sensor and processing a sensor signal, and a processor for storing device information indicating at least one of the installation location and the configuration, receiving type information indicating a type of the sensor, and transmitting a program based on the type information and the device information to the controller.
    Type: Application
    Filed: August 12, 2024
    Publication date: February 27, 2025
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Emi KAKISADA, Hiroki MORI
  • Signal processing system which can reduce burden applied to a CPU or a signal processor
    Patent number: 6643680
    Abstract: In a signal processing system, a plurality of mutually different applications are simultaneously executed. In the system, combinations of applications are predetermined as application patterns according to a given condition, and a processing operation for each application pattern is stored on a table as an operation pattern. Upon an occurrence of change in combination, the operation pattern is determined by referring to the table so that calculation burden in the system can be reduced.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: November 4, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Miki Kato, Emi Kakisada
  • CACHE MEMORY MANAGEMENT METHOD FOR REAL TIME OPERATING SYSTEM
    Publication number: 20010039558
    Abstract: In the RTOS (Real Time Operating System) of this invention, task programs are programmed without including a cache memory management process. The RTOS itself includes the process. Generally, the time of transmitting task code is longer than that of switching between tasks so that waiting time has occurred in a conventional RTOS. The RTOS of this invention loads a task to a cache bank at the frame before executing the task so that the waiting time does not occur and the cache memory management process cause no delay time.
    Type: Application
    Filed: June 9, 1998
    Publication date: November 8, 2001
    Inventors: EMI KAKISADA, YUJI FUJIWARA