Abstract: Semiconductor power devices with improved electrical characteristics are disclosed including rectifying contacts on a specially prepared semiconductor surface with little or no additional exposure to other chemical treatments, with oxide passivation and edge termination at a face of the semiconductor substrate adjacent to and surrounding the power device. The edge termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize a portion of the substrate face and preferably self-aligned to the device. The passivated, edge-terminated devices exhibit improved characteristics relative to passivated devices with characteristics approaching those of the native semiconductor with the additional advantages of passivation protection. Methods for making and using the devices are also disclosed.

Abstract: A method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor (MOSFET) is provided. Specifically, the present invention provides a method for applying an oxide layer to a silicon carbide substrate so that the oxide-substrate interface of the resulting SiC MOSFET is improved. The method includes forming the oxide layer in the presence of metallic impurities.

Abstract: A method for improving inversion layer mobility in a silicon carbide metal-oxide semiconductor field-effect transistor (MOSFET) is provided. Specifically, the present invention provides a method for applying an oxide layer to a silicon carbide substrate so that the oxide-substrate interface of the resulting SiC MOSFET is improved. The method includes forming the oxide layer in the presence of metallic impurities.

Abstract: Semiconductor power devices with improved electrical characteristics are disclosed including rectifying contacts on a specially prepared semiconductor surface with little or no additional exposure to other chemical treatments, with oxide passivation and edge termination at a face of the semiconductor substrate adjacent to and surrounding the power device. The edge termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize a portion of the substrate face and preferably self-aligned to the device. The passivated, edge-terminated devices exhibit improved characteristics relative to passivated devices with characteristics approaching those of the native semiconductor with the additional advantages of passivation protection. Methods for making and using the devices are also disclosed.

Abstract: Semiconductor power devices with improved electrical characteristics are disclosed including rectifying contacts on a specially prepared semiconductor surface with little or no additional exposure to other chemical treatments, with oxide passivation and edge termination at a face of the semiconductor substrate adjacent to and surrounding the power device. The edge termination region is preferably formed by implanting electrically inactive ions, such as argon, into the substrate face at sufficient energy and dose to amorphize a portion of the substrate face and preferably self-aligned to the device. The passivated, edge-terminated devices exhibit improved characteristics relative to passivated devices with characteristics approaching those of the native semiconductor with the additional advantages of passivation protection. Methods for making and using the devices are also disclosed.

Abstract: The present invention is directed to an SOI LDMOS device having improved current handling capability, particularly in the source-follower mode, while maintaining an improved breakdown voltage capability. The improvement in current handling capability is achieved in a first embodiment by introducing an offset region between the source and thin drift regions. The offset region achieves an offset between the onset of the linear doping profile and the thinning of the SOI layer that results in the thin drift region. In a second embodiment a further increase in the current handling capability of an SOI device is achieved by fabricating an oxide layer over the offset region, with the thickness of the oxide layer layer varying up to about half the thickness of the oxide layer fabricated over the thin drift region.

Abstract: A lateral silicon carbide (SiC) semiconductor device includes a SIC substrate of a first conductivity type, a SiC epitaxial layer of the first conductivity type on the substrate and a SiC surface layer on the SiC epitaxial layer. The SiC surface layer has a SiC first region of the first conductivity type, a SiC lateral drift region of a second conductivity type opposite to that of the first conductivity type adjacent the first region and forming a p-n junction therewith, and a SiC second region of the second conductivity type spaced apart from the first region by the drift region. By providing the drift region with a variable doping level which increases in a direction from the first region to the second region, compact SiC semiconductor devices such as high-voltage diodes or MOSFETs can be formed which can operate at high voltages, high temperatures and high frequencies, thus providing a substantial advantage over known devices.

Abstract: The present invention is directed to a thin film transistor having a linear doping profile between the gate and drain regions. This is constructed in a particular manner in order to achieve a thin film transistor having a significantly high breakdown voltage of the order of 700 to 900 volts, much greater than that achieved in the prior art.

Abstract: The present invention is directed to a method and thin film transistor having a linear doping profile between the gate and drain regions. This is constructed in a particular manner in order to achieve a thin film transistor having a significantly high breakdown voltage of the order of 700 to 900 volts, much greater than that achieved in the prior art.

Abstract: A silicon-on-insulator material is formed by a method which includes the steps of forming a p-type silicon epitaxial layer, doped with boron and a higher concentration of germanium, on the surface of a semiconductor silicon substrate, forming an additional silicon epitaxial layer on the p-type silicon epitaxial layer, forming an oxide layer on the additional silicon epitaxial layer, forming an oxide layer on another semiconductor silicon substrate, forming a laminate by bringing into contact, at room temperature, the oxide layers thereby bonding together the substrates, etching the silicon substrate provided with the silicon epitaxial layers, with an isotropic etch to remove most of this silicon substrate, exposing the laminate to an anisotropic etch for this silicon substrate until the remainder of this silicon substrate is removed but only a part of the p-type epitaxial layer is removed and then exposing the resultant structure to an additional isotropic etch for the p-type epitaxial layer for a time suffic

Abstract: A silicon on insulator of integrated circuit comprising a plurality of components typically adopted for high voltage application having a semiconductor substrate of a first conductivity type, an insulating layer provided on the substrate, a semiconductor layer provided on the insulating layer, a number of laterally separated circuit elements forming parts of a number of subcircuits provided in the semiconductor layer, a diffusion layer of a second conductivity type opposite to that of the first conductivity type provided in the substrate and laterally separated from all the other circuit elements and means for holding the diffusion layer at a voltage at least equal to that of the highest potential of any of the subcircuits present in the integrated device.

Abstract: The present invention provides a high resistance film with a low temperature coefficient of resistance. Such films can be used as resistors in integrated and hybrid circuits, as well as resistive layers in passivating circuits for high-voltage devices. In the latter circuits, the passivating layers shield the device from the detrimental influence of external or internal electric fields. The ability to obtain a low temperature coefficient of resistance enables obtaining a high sheet resistance without being influenced by changing temperatures.

Abstract: A monocrystalline layer of silicon is formed on an insulating substrate according to the present invention by use of a semi-insulating layer between the insulator and silicon film. This semi-insulating layer is composed of a mixture of silicon crystallites embedded in a silicon dioxide glass, for example. Such a technique results in a structure which is substantially free of cracking resulting from differences in thermal expansion coefficients between the insulating substrate and the monocrystalline silicon layer.

Abstract: An apparatus and technique are described for storing a latent radiation image on a photoconductor by way of charge produced on the photoconductor and absorption of light from an object transmitted onto the photoconductor. Read out is provided by scanning a light source over the photoconductor to create a photocurrent which activates a CRT read out device or is stored in an image recording system.

Abstract: A signal detector including a transducer element, an X-Y addressed array of field-effect transistor electrically coupled, e.g., capacitively or directly coupled, to the transducer element, and means for addressing the transistor X-Y array.