Patents by Inventor Emil Casey Israel

Emil Casey Israel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9953903
    Abstract: Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device having enhanced heat dissipation. The method comprises providing a lead frame array, of a first thickness, with a plurality of die placement areas each die placement area with bond pad landings, the bond bad landings situated about a die placement area on one or multiple sides, the bond pad landings having upper surfaces and opposite lower surfaces, placing a heat sink assembly of a second thickness, having at least two mounting tabs of the first thickness, in each die placement area and attaching the at least two mounting tabs onto corresponding bond pad landings serving as anchor pads, die bonding a device die on the heat sink device assembly, conductively bonding device die bond pads to corresponding bond pad landings, and encapsulating the wire bonded device die, heat sink assembly and lead frame array in a molding compound.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: April 24, 2018
    Assignee: NXP B.V.
    Inventors: Leonardus Antonius Elisabeth van Gemert, Tonny Kamphuis, Rintje van der Meulen, Emil Casey Israel
  • Publication number: 20170025334
    Abstract: Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device having enhanced heat dissipation. The method comprises providing a lead frame array, of a first thickness, with a plurality of die placement areas each die placement area with bond pad landings, the bond bad landings situated about a die placement area on one or multiple sides, the bond pad landings having upper surfaces and opposite lower surfaces, placing a heat sink assembly of a second thickness, having at least two mounting tabs of the first thickness, in each die placement area and attaching the at least two mounting tabs onto corresponding bond pad landings serving as anchor pads, die bonding a device die on the heat sink device assembly, conductively bonding device die bond pads to corresponding bond pad landings, and encapsulating the wire bonded device die, heat sink assembly and lead frame array in a molding compound.
    Type: Application
    Filed: July 22, 2015
    Publication date: January 26, 2017
    Inventors: Leonardus Antonius Elisabeth van Gemert, Tonny Kamphuis, Rintje van der Meulen, Emil Casey Israel
  • Patent number: 9263299
    Abstract: In an example embodiment, an integrated circuit (IC) comprises a device die having a top-side surface and an under-side surface, the top-side surface having bond pads connected to active circuit elements, the under-side surface having a conductive surface. A first set of lead frame clips having upper portions and lower portions, are solder-anchored, on the upper portions, to a first set of bond pads; the lower portions are flush with the conductive surface. Wires are bonded to an additional set of bond pads opposite the first set of bond pads and to lower lead frame portions of a second set of lead frame clips opposite the first set of lead frame clips; the lower lead frame portions of the second set of lead frame clips are flush with the conductive surface. The device is encapsulated in a molding compound leaving exposed the conductive surface and underside surfaces of the first and second sets of the lead frame portions.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: February 16, 2016
    Assignee: NXP B.V.
    Inventors: Leonardus Antonius Elisabeth van Gemert, Emil Casey Israel
  • Publication number: 20160005679
    Abstract: Consistent with an example embodiment, there is a method for packaging an integrated circuit (IC) device. The method comprises attaching a lead frame to the carrier tape; the lead frame has an array of device positions on the carrier tape and pad landings surround the device positions for making electrical connections to the plurality of active device die. A plurality of active device die are mounted on the carrier tape within the array of device positions; each said active device die has bond pads, each of said active device die has been subjected to back-grinding to a prescribed thickness and has a solderable conductive surface on its underside. On the bond pads, the plurality of active devices are wire bonded to the pad landings on the lead frame. The lead frame and wire bonded active devices are encapsulated, leaving the solderable die backside and lead frame backside exposed.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Emil Casey Israel, Leonardus Antonius Elisabeth van Gemert, Roelf Anco Jacob Groenhuis
  • Publication number: 20160005680
    Abstract: Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device having enhanced heat dissipation. The method comprises providing a heat sink array having a top-side surface and an under-side surface; the heat sink array has die placement areas on the top-side surface. A plurality of active device die are die bonded onto the die placement areas on the heat sink array. The plurality of active device die are singulated into an individual heat sink device die having a heat sink portion attached to its underside.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Emil Casey Israel, Leonardus Antonius Elisabeth van Gemert, Tonny Kamphuis
  • Publication number: 20160005626
    Abstract: In an example embodiment, an integrated circuit (IC) comprises a device die having a top-side surface and an under-side surface, the top-side surface having bond pads connected to active circuit elements, the under-side surface having a conductive surface. A first set of lead frame clips having upper portions and lower portions, are solder-anchored, on the upper portions, to a first set of bond pads; the lower portions are flush with the conductive surface. Wires are bonded to an additional set of bond pads opposite the first set of bond pads and to lower lead frame portions of a second set of lead frame clips opposite the first set of lead frame clips; the lower lead frame portions of the second set of lead frame clips are flush with the conductive surface. The device is encapsulated in a molding compound leaving exposed the conductive surface and underside surfaces of the first and second sets of the lead frame portions.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 7, 2016
    Inventors: Leonardus Antonius Elisabeth van Gemert, Emil Casey Israel