Abstract: A method of simultaneously manufacturing First and second pixels respectively shielded on a first and on a second side are simultaneously manufactured using a process wherein a first insulator is deposited on an active area. A first metal level is deposited and defined, with a first mask, to form a shield on the first side of the first pixel and on the second side of the second pixel, and a line opposite to the shield. A second insulator is deposited, and via openings therein are defined, with a second mask. An overlying second metal level is deposited and defined, with a third mask, to form two connection areas covering the via openings on each side of the first and second pixels. The second and third masks are identical for the first and second pixels.

Abstract: A method of simultaneously manufacturing First and second pixels respectively shielded on a first and on a second side are simultaneously manufactured using a process wherein a first insulator is deposited on an active area. A first metal level is deposited and defined, with a first mask, to form a shield on the first side of the first pixel and on the second side of the second pixel, and a line opposite to the shield. A second insulator is deposited, and via openings therein are defined, with a second mask. An overlying second metal level is deposited and defined, with a third mask, to form two connection areas covering the via openings on each side of the first and second pixels. The second and third masks are identical for the first and second pixels.

Abstract: A method of simultaneously manufacturing First and second pixels respectively shielded on a first and on a second side are simultaneously manufactured using a process wherein a first insulator is deposited on an active area. A first metal level is deposited and defined, with a first mask, to form a shield on the first side of the first pixel and on the second side of the second pixel, and a line opposite to the shield. A second insulator is deposited, and via openings therein are defined, with a second mask. An overlying second metal level is deposited and defined, with a third mask, to form two connection areas covering the via openings on each side of the first and second pixels. The second and third masks are identical for the first and second pixels.

Abstract: An image sensor pixel may include an array of four photosites, a transverse isolator wall separating the array in two rows of two photosites, and a longitudinal isolator wall separating the array in two columns of two photosites. Both ends of the longitudinal wall may be set back relative to the edges of the array. First and second conversion nodes may be arranged in the spaces between the longitudinal wall and the edges of the matrix. Each conversion node may be common to two adjacent photosites, and an independent transfer gate may be between each photosite and the corresponding conversion node.

Abstract: An image sensor pixel may include an array of four photosites, a transverse isolator wall separating the array in two rows of two photosites, and a longitudinal isolator wall separating the array in two columns of two photosites. Both ends of the longitudinal wall may be set back relative to the edges of the array. First and second conversion nodes may be arranged in the spaces between the longitudinal wall and the edges of the matrix. Each conversion node may be common to two adjacent photosites, and an independent transfer gate may be between each photosite and the corresponding conversion node.

Abstract: A method of simultaneously manufacturing First and second pixels respectively shielded on a first and on a second side are simultaneously manufactured using a process wherein a first insulator is deposited on an active area. A first metal level is deposited and defined, with a first mask, to form a shield on the first side of the first pixel and on the second side of the second pixel, and a line opposite to the shield. A second insulator is deposited, and via openings therein are defined, with a second mask. An overlying second metal level is deposited and defined, with a third mask, to form two connection areas covering the via openings on each side of the first and second pixels. The second and third masks are identical for the first and second pixels.