Patents by Inventor Emily Kinser
Emily Kinser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9257361Abstract: Methods and structures for thermoelectric cooling of 3D semiconductor structures are disclosed. Thermoelectric vias (TEVs) to form a thermoelectric cooling structure. The TEVs are formed with an etch process similar to that used in forming electrically active through-silicon vias (TSVs). However, the etched cavities are filled with materials that exhibit the thermoelectric effect, instead of a conductive metal as with a traditional electrically active TSV. The thermoelectric materials are arranged such that when a voltage is applied to them, the thermoelectric cooling structure carries heat away from the interior of the structure from the junction where the thermoelectric materials are electrically connected.Type: GrantFiled: November 4, 2014Date of Patent: February 9, 2016Assignee: GLOBALFOUNDRIES Inc.Inventors: Mukta G. Farooq, Emily Kinser, JoAnn M. Rolick-DiGiacomio, Charu Tejwani
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Publication number: 20150059361Abstract: Methods and structures for thermoelectric cooling of 3D semiconductor structures are disclosed. Thermoelectric vias (TEVs) to form a thermoelectric cooling structure. The TEVs are formed with an etch process similar to that used in forming electrically active through-silicon vias (TSVs). However, the etched cavities are filled with materials that exhibit the thermoelectric effect, instead of a conductive metal as with a traditional electrically active TSV. The thermoelectric materials are arranged such that when a voltage is applied to them, the thermoelectric cooling structure carries heat away from the interior of the structure from the junction where the thermoelectric materials are electrically connected.Type: ApplicationFiled: November 4, 2014Publication date: March 5, 2015Applicant: International Business Machines CorporationInventors: Mukta G. Farooq, Emily Kinser, JoAnn M. Rolick-DiGiacomio, Charu Tejwani
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Patent number: 8933562Abstract: Methods and structures for thermoelectric cooling of 3D semiconductor structures are disclosed. Thermoelectric vias (TEVs) to form a thermoelectric cooling structure. The TEVs are formed with an etch process similar to that used in forming electrically active through-silicon vias (TSVs). However, the etched cavities are filled with materials that exhibit the thermoelectric effect, instead of a conductive metal as with a traditional electrically active TSV. The thermoelectric materials are arranged such that when a voltage is applied to them, the thermoelectric cooling structure carries heat away from the interior of the structure from the junction where the thermoelectric materials are electrically connected.Type: GrantFiled: January 24, 2013Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Emily Kinser, Mukta G. Farooq, JoAnn M. Rolick-DiGiacomio, Charu Tejwani
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Publication number: 20140203433Abstract: Methods and structures for thermoelectric cooling of 3D semiconductor structures are disclosed. Thermoelectric vias (TEVs) to form a thermoelectric cooling structure. The TEVs are formed with an etch process similar to that used in forming electrically active through-silicon vias (TSVs). However, the etched cavities are filled with materials that exhibit the thermoelectric effect, instead of a conductive metal as with a traditional electrically active TSV. The thermoelectric materials are arranged such that when a voltage is applied to them, the thermoelectric cooling structure carries heat away from the interior of the structure from the junction where the thermoelectric materials are electrically connected.Type: ApplicationFiled: January 24, 2013Publication date: July 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Emily Kinser, Mukta G. Farooq, JoAnn M. Rolick-DiGiacomio, Charu Tejwani
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Patent number: 8771533Abstract: A dielectric material layer is deposited on exposed surfaces of a bonded structure that includes a first substrate and a second substrate. The dielectric material layer is formed on an exposed planar surface of a second substrate and the entirety of peripheral sidewalls of the first and second substrates. The dielectric material layer can be formed by chemical vapor deposition, atomic layer deposition, or plasma induced deposition. Further, the dielectric material layer seals the entire periphery of the interface between the first and second substrates. If a planar portion of the dielectric material layer can be removed by planarization to facilitate thinning of the bonded structure, the remaining portion of the dielectric material layer can form a dielectric ring.Type: GrantFiled: February 28, 2013Date of Patent: July 8, 2014Assignee: International Business Machines CorporationInventors: Mukta G. Farooq, Emily Kinser, Richard S. Wise, Hakeem B. S. Akinmade-Yusuff
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Patent number: 8679611Abstract: A dielectric material layer is deposited on exposed surfaces of a bonded structure that includes a first substrate and a second substrate. The dielectric material layer is formed on an exposed planar surface of a second substrate and the entirety of peripheral sidewalls of the first and second substrates. The dielectric material layer can be formed by chemical vapor deposition, atomic layer deposition, or plasma induced deposition. Further, the dielectric material layer seals the entire periphery of the interface between the first and second substrates. If a planar portion of the dielectric material layer can be removed by planarization to facilitate thinning of the bonded structure, the remaining portion of the dielectric material layer can form a dielectric ring.Type: GrantFiled: July 24, 2012Date of Patent: March 25, 2014Assignee: International Business Machines CorporationInventors: Mukta G. Farooq, Emily Kinser, Richard S. Wise, Hakeem B. S. Akinmade-Yusuff
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Publication number: 20120288687Abstract: A dielectric material layer is deposited on exposed surfaces of a bonded structure that includes a first substrate and a second substrate. The dielectric material layer is formed on an exposed planar surface of a second substrate and the entirety of peripheral sidewalls of the first and second substrates. The dielectric material layer can be formed by chemical vapor deposition, atomic layer deposition, or plasma induced deposition. Further, the dielectric material layer seals the entire periphery of the interface between the first and second substrates. If a planar portion of the dielectric material layer can be removed by planarization to facilitate thinning of the bonded structure, the remaining portion of the dielectric material layer can form a dielectric ring.Type: ApplicationFiled: July 24, 2012Publication date: November 15, 2012Applicant: International Business Machines CorporationInventors: Mukta G. Farooq, Emily Kinser, Richard S. Wise, Hakeem B.S. Akinmade-Yusuff
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Patent number: 8287980Abstract: A dielectric material layer is deposited on exposed surfaces of a bonded structure that includes a first substrate and a second substrate. The dielectric material layer is formed on an exposed planar surface of a second substrate and the entirety of peripheral sidewalls of the first and second substrates. The dielectric material layer can be formed by chemical vapor deposition, atomic layer deposition, or plasma induced deposition. Further, the dielectric material layer seals the entire periphery of the interface between the first and second substrates. If a planar portion of the dielectric material layer can be removed by planarization to facilitate thinning of the bonded structure, the remaining portion of the dielectric material layer can form a dielectric ring.Type: GrantFiled: October 29, 2009Date of Patent: October 16, 2012Assignee: International Business Machines CorporationInventors: Mukta G. Farooq, Emily Kinser, Richard S. Wise, Hakeem B. S. Akinmade-Yusuff
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Publication number: 20110104426Abstract: A dielectric material layer is deposited on exposed surfaces of a bonded structure that includes a first substrate and a second substrate. The dielectric material layer is formed on an exposed planar surface of a second substrate and the entirety of peripheral sidewalls of the first and second substrates. The dielectric material layer can be formed by chemical vapor deposition, atomic layer deposition, or plasma induced deposition. Further, the dielectric material layer seals the entire periphery of the interface between the first and second substrates. If a planar portion of the dielectric material layer can be removed by planarization to facilitate thinning of the bonded structure, the remaining portion of the dielectric material layer can form a dielectric ring.Type: ApplicationFiled: October 29, 2009Publication date: May 5, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mukta G. Farooq, Emily Kinser, Richard S. Wise, Hakeem B.S. Akinmade-Yusuff
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Patent number: 7910484Abstract: A method of forming a TEOS oxide layer over an nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer formed on a substrate. The method includes forming the nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer on a top surface and a top side beveled edge proximate to the top surface of a substrate; removing or preventing formation of a carbon-rich layer on a bottom side bevel edge region proximate to a bottom surface of the substrate or converting the carbon-rich layer to nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide; and forming the TEOS oxide layer on the top surface, the top side beveled edge and the bottom side bevel edge region of the substrate.Type: GrantFiled: January 11, 2008Date of Patent: March 22, 2011Assignee: International Business Machines CorporationInventors: Chester T. Dziobkowski, Thomas F. Houghton, Emily Kinser, Darryl D. Restaino, Yun-Yu Wang
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Publication number: 20090181544Abstract: A method of forming a TEOS oxide layer over an nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer formed on a substrate. The method includes forming the nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer on a top surface and a top side beveled edge proximate to the top surface of a substrate; removing or preventing formation of a carbon-rich layer on a bottom side bevel edge region proximate to a bottom surface of the substrate or converting the carbon-rich layer to nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide; and forming the TEOS oxide layer on the top surface, the top side beveled edge and the bottom side bevel edge region of the substrate.Type: ApplicationFiled: January 11, 2008Publication date: July 16, 2009Inventors: Chester T. Dziobkowski, Thomas F. Houghton, Emily Kinser, Darryl D. Restaino, Yun-Yu Wang