Patents by Inventor Emmanuel Perrin

Emmanuel Perrin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10283588
    Abstract: An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: May 7, 2019
    Assignee: STMICROELECTRONICS (CROLLES 2) SAS
    Inventor: Emmanuel Perrin
  • Publication number: 20180108731
    Abstract: An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.
    Type: Application
    Filed: December 18, 2017
    Publication date: April 19, 2018
    Inventor: Emmanuel Perrin
  • Patent number: 9876076
    Abstract: An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: January 23, 2018
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Emmanuel Perrin
  • Patent number: 9707258
    Abstract: The present invention relates to the use of a Bifidobacterium strain for the preparation of compositions, in particular of an infant formula, intended for the prevention and/or treatment of allergic-type manifestations. These compositions are obtained from a Bifidobacterium culture, without hydrolyzing milk proteins. The bacteria, which preferably belong to the species Bifidobacterium breve, may be killed or removed from the composition during the process.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: July 18, 2017
    Assignee: Compagnie Gervais Danone
    Inventors: Cécile Aubert-Jacquin, Francis Lecroix, Emmanuel Perrin, Valérie Petay
  • Publication number: 20170173104
    Abstract: The present invention relates to methods for feeding of infants delivered via caesarean section and to compositions to be administered to infants delivered via caesarean section and in particular to the use of a product obtained by fermentation of milk, whey, whey protein, whey protein hydrolysate, casein, casein hydrolysate and/or lactose by lactic acid producing bacteria. Thereby it is possible to stimulate a fast colonisation of the intestinal microbiota of said infants.
    Type: Application
    Filed: September 28, 2016
    Publication date: June 22, 2017
    Applicant: N.V. Nutricia
    Inventors: Joachim SCHMITT, Emmanuel PERRIN, Bernd STAHL, Günther BOEHM
  • Publication number: 20160351660
    Abstract: An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.
    Type: Application
    Filed: December 2, 2015
    Publication date: December 1, 2016
    Inventor: Emmanuel PERRIN
  • Patent number: 8197826
    Abstract: The invention relates to an immunomodulatory product obtained from a Bifidobacterium culture, to the use thereof, especially as a medicament or a food ingredient, and to pharmaceutical or food compositions containing the same.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: June 12, 2012
    Assignee: Compagnie Gervais Danone
    Inventors: Valérie Petay, Francis Lecroix, Emmanuel Perrin, Charles Gontier, Jean-Pierre Blareau, Marie-Bénédicte Romond, Elisabeth Singer, Marie-Françoise Odou, Catherine Demailly-Mullie
  • Publication number: 20110150851
    Abstract: The present invention relates to compositions to be administered to infants delivered via caesarean section and in particular to a product comprising inactivated cells and/or bacterial cell fragments of Gram-negative bacteria and of optionally inactivated Gram-positive bacteria. Thereby it is possible to stimulate a fast colonisation of the intestinal microbiota of said infants.
    Type: Application
    Filed: June 19, 2009
    Publication date: June 23, 2011
    Applicant: N.V. NUTRICIA
    Inventors: Joachim Schmitt, Francis Lecroix, Pierre Jesenne, Bernd Stahl, Günther Boehm, Emmanuel Perrin
  • Publication number: 20110117077
    Abstract: The present invention relates to methods for feeding of infants delivered via caesarean section and to compositions to be administered to infants delivered via caesarean section and in particular to the use of a product obtained by fermentation of milk, whey, whey protein, whey protein hydrolysate, casein, casein hydrolysate and/or lactose by lactic acid producing bacteria. Thereby it is possible to stimulate a fast colonisation of the intestinal microbiota of said infants.
    Type: Application
    Filed: June 12, 2009
    Publication date: May 19, 2011
    Inventors: Joachim Schmitt, Emmanuel Perrin, Bernd Stahl, Günther Boehm
  • Publication number: 20100221226
    Abstract: The present invention relates to the use of a Bifidobacterium strain for the preparation of compositions, in particular of an infant formula, intended for the prevention and/or treatment of allergic-type manifestations. These compositions are obtained from a Bifidobacterium culture, without hydrolyzing milk proteins. The bacteria, which preferably belong to the species Bifidobacterium breve, may be killed or removed from the composition during the process.
    Type: Application
    Filed: October 2, 2008
    Publication date: September 2, 2010
    Inventors: Cécile Aubert-Jacquin, Francis Lecroix, Emmanuel Perrin, Valérie Petay
  • Publication number: 20080248056
    Abstract: The invention relates to an immunomodulatory product obtained from a Bifidobacterium culture, to the use thereof, especially as a medicament or a food ingredient, and to pharmaceutical or food compositions containing the same.
    Type: Application
    Filed: April 8, 2004
    Publication date: October 9, 2008
    Applicant: COMPAGNIE GERVAIS DANONE
    Inventors: Valerie Petay, Francis Lecroix, Emmanuel Perrin, Charles Gontier, Jean-Pierre Blareau, Marie-Benedicte Romond, Elisabeth Singer, Marie-Francoise Odou, Catherine Demailly-Mullie
  • Patent number: 6623993
    Abstract: A method of determining the time for polishing the surface of an integrated circuit wafer on a polishing machine. A sample wafer is fabricated to include at least one high plateau and at least one low plateau joined by a sudden transition. At least one initial profile is topographically scanned, and the surface of the sample wafer is polished at a particular polishing pressure for a particular polishing time. The final profile of the polished layer is topographically scanned in the corresponding area, and the initial and final topographical scans of the sample wafer are converted into Fourier series. The surface of the wafer to be polished is topographically scanned, and the topographic scan of the wafer to be polished is converted into a Fourier series. The time for polishing the wafer to be polished is calculated from the Fourier series and the average thickness to be removed.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: September 23, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Emmanuel Perrin, Herve Jaouen
  • Publication number: 20020031848
    Abstract: A method of determining the time for polishing the surface of an integrated circuit wafer on a polishing machine. A sample wafer is fabricated to include at least one high plateau and at least one low plateau joined by a sudden transition. At least one initial profile is topographically scanned, and the surface of the sample wafer is polished at a particular polishing pressure for a particular polishing time. The final profile of the polished layer is topographically scanned in the corresponding area, and the initial and final topographical scans of the sample wafer are converted into Fourier series. The surface of the wafer to be polished is topographically scanned, and the topographic scan of the wafer to be polished is converted into a Fourier series. The time for polishing the wafer to be polished is calculated from the Fourier series and the average thickness to be removed.
    Type: Application
    Filed: July 3, 2001
    Publication date: March 14, 2002
    Applicant: STMicroelectronics S.A.
    Inventors: Emmanuel Perrin, Herve Jaouen
  • Patent number: 6254457
    Abstract: A process for polishing, on a polishing machine and under defined polishing conditions, the external surface of at least one wafer of integrated circuits comprising a projecting feature covered over the entire surface of the wafer with an external layer of a material, consisting in calculating a main equivalent thickness equal to the main surface density of the projecting feature multiplied by the thickness of the latter; in polishing, under the defined polishing conditions, a reference wafer comprising an external layer of the material, having a uniform thickness and covering the surface of this reference wafer, so as to determine the rate of removal by the polishing machine corresponding to the ratio of the thickness removed to the polishing time elapsed; in calculating a polishing time equal to the ratio of the aforementioned equivalent thickness to the aforementioned rate of removal; in calculating a total equivalent thickness equal to the sum of the main equivalent thickness and of a complementary thickn
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: July 3, 2001
    Assignee: STMicroelectronics, S.A.
    Inventors: Emmanuel Perrin, Frédéric Robert, Henri Banvillet, Luc Liauzu
  • Patent number: 5846939
    Abstract: The present invention relates to the use of the decapeptide having the amino acid sequence of SEQ ID NO.:1 ##STR1## in the preparation of medicines having benzodiazepine-type activity, particularly useful for the treatment of convulsions and anxiety. The invention also relates to phamaceutical compositions, food supplements, and foodstuffs for special diets containing the said decapeptide.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: December 8, 1998
    Assignee: Societe Cooperative Agricole Laitiere D'Artois Et Des Flandres, La Prosperite Feriere
    Inventors: Laurent Miclo, Emmanuel Perrin, Alain Driou, Jean-Fran.cedilla.ois Boudier, Catherine Iung, Guy Linden