Abstract: Some embodiments include a method. The method can include providing a carrier substrate having an edge. Further, the method can include providing a cross-linking adhesive, and providing a flexible substrate having an edge. Further still, the method can include coupling the flexible substrate to the carrier substrate using the cross-linking adhesive such that at least a portion of the edge of the flexible substrate is recessed from the edge of the carrier substrate and such that the cross-linking adhesive has an exposed portion of the cross-linking adhesive at an offset portion of the first surface of the carrier substrate between the at least the portion of the edge of the flexible substrate and the edge of the carrier substrate. Meanwhile, the method can include etching the exposed portion of the cross-linking adhesive. Other embodiments of related methods and devices are also disclosed.

Abstract: Some embodiments include a method. The method can include providing a carrier substrate having an edge. Further, the method can include providing a cross-linking adhesive, and providing a flexible substrate having an edge. Further still, the method can include coupling the flexible substrate to the carrier substrate using the cross-linking adhesive such that at least a portion of the edge of the flexible substrate is recessed from the edge of the carrier substrate and such that the cross-linking adhesive has an exposed portion of the cross-linking adhesive at an offset portion of the first surface of the carrier substrate between the at least the portion of the edge of the flexible substrate and the edge of the carrier substrate. Meanwhile, the method can include etching the exposed portion of the cross-linking adhesive. Other embodiments of related methods and devices are also disclosed.

Abstract: A method is provided for preventing electron emission from a sidewall (34) of a gate electrode (20) and the edge (28) of the gate electrode stack of a field emission device (10), the gate electrode (20) having a surface (24) distally disposed from an anode (40) and a side (26) proximate to emission electrodes (38). The method comprises growing dielectric material (22) over the surface (24) and side (26) of the gate electrode (20), and performing an anisotropic etch (32) normal to the surface (24) to remove the dielectric material (22) from the surface (24) and leaving at least a portion of the dielectric material (22) on the side (26) of the gate electrode (20) and edge (28) of the gate electrode stack.

Abstract: A field emission device (10) is provided that prevents electrical breakdown. The field emission device (10) comprises an anode (40) distally disposed from a cathode plate that includes an insulating substrate (12) having a portion exposed to the anode (40), and a cathode metal (14) overlying another portion of the insulating substrate (12). A gate electrode (26) overlies an oxide (24) above at least a portion of the cathode metal (14) and optionally above a portion of the substrate. A dielectric layer (18) is positioned between a resistive layer (22) and the cathode metal (14), and substantially all of the exposed substrate, and underlies substantially all of the gate electrode (26) including its edges (34, 46), providing a resistance between the cathode metal (14) and the edges (34, 46).

Abstract: An apparatus for focusing electrons being emitted from a field emission device comprises a cathode metal layer (20,44,52) formed over a first portion of a substrate (12,41,51) to partially define a sidewall (23) for a trench (25) in a second portion of the substrate. A ballast layer (22,46,53) is formed over the second portion, the cathode metal layer (20,44,52), and the sidewall (23). A first dielectric layer (24,47,54) is formed over the ballast layer (22,46,53) in the first portion and a gate extraction metal layer (26,48,55) is formed thereover. At least one emitter (30) is formed above the substrate and in the trench (25) having the sidewall (23) defined by the first dielectric layer (24,47,54) and the cathode metal layer (20,44,52). The ballast layer (22,46,53) extends along the sidewall and conductively contacts the cathode metal layer and the at least one emitter and provides a force that counteracts the sidewise pull of the gate extraction metal layer (26,48,55).

Abstract: A process for forming a catalyst layer for carbon nanotube growth comprising forming a catalyst layer having a first and second portion over one of a cathode metal layer or a ballast resistor layer; patterning a photoresist over the first portion; etching the second portion with a chlorine/argon plasma; removing the photoresist with an ash process; and removing the veils and preparing the surface for carbon nanotube growth with a semi-aqueous hydroxylamine solution.

Abstract: A fabrication process is provided for reducing leakage current in a field emission display having at least one electron emitter (24) electrically coupled to a ballast resistor (16) coupled to a cathode metal (14), wherein at least one defect (28) extends to a gate electrode (20) from a region (22) electrically coupled to the ballast resistor, the method comprising heating (32) to reduce the resistance of the ballast resistor; and applying (34) a voltage between the cathode metal and the gate electrode thereby creating a current through the at least one defect to create an electrical open therein.

Abstract: An apparatus is provided for reducing color bleed in a flat panel display. The apparatus comprises an anode (30) with a plurality of phosphors (28) of at least two colors sequentially disposed thereon. A cathode (14) is arranged in parallel opposed position to and separated from the anode (30) and contains a plurality of pads (40) of emitters. Each pad (40) is disposed on the cathode (14) in spaced relationship to and aligned with one of the at least two colors, respectively, wherein electrons from each of the plurality of pads of emitters that drift from its intended phosphor (28) are encouraged to drift toward an adjacent phosphor (28) of the same color.

Abstract: A field emissive display (40) having an anode plate (10) coupled to a cathode plate (20) and a method for manufacturing the field emissive display (40). A substrate (21) of the cathode plate (20) is manufactured or selected such that its coefficient of thermal expansion substantially matches that of the anode plate (10), i.e., the coefficients of thermal expansion of the cathode plate (20) and the anode plate (10) are within ten percent of each other. The cathode plate (20) is coupled to the anode plate (10) by means of a frit structure (41) whose coefficient of thermal expansion preferably substantially matches that of the cathode plate (20) and the anode plate (10). A control circuit can be mounted to the bottom surface of the field emissive display (40).

Abstract: A vacuum gap dielectric field emission triode and a method of fabrication include a conductive layer positioned on a supporting substrate and an emitter positioned on the conductive layer. A gate metal layer electrically separated from the conductive layer defines a metal bridge gate surrounding the emitter and separated from the emitter by a substantially fixed distance. The gate metal layer defines a gate opening through the metal bridge gate overlying the emitter. An anode is positioned in spaced relationship to the gate metal layer and the triode is sealed in a substantial vacuum so that the emitter is separated from the metal bridge by the substantial vacuum and the metal bridge is separated from the anode by the substantial vacuum.

Abstract: A field emissive display (40) having an anode plate (10) coupled to a cathode plate (20) and a method for manufacturing the field emissive display (40). A substrate (21) of the cathode plate (20) is manufactured or selected such that its coefficient of thermal expansion substantially matches that of the anode plate (10), i.e., the coefficients of thermal expansion of the cathode plate (20) and the anode plate (10) are within ten percent of each other. The cathode plate (20) is coupled to the anode plate (10) by means of a frit structure (41) whose coefficient of thermal expansion preferably substantially matches that of the cathode plate (20) and the anode plate (10). A control circuit can be mounted to the bottom surface of the field emissive display (40).

Abstract: A trap filter chamber (16) removes chemical by-products created during the manufacturing process of semiconductor wafers in a low pressure chemical vapor deposition reactor (12). A vapor containing the process by-products is discharged from the reactor to the trap chamber (16) by way of connecting pipe (14). The vapors are drawn through the trap chamber by a vacuum pump (20). The connecting pipe at the inlet of the trap chamber has a tapered diameter section (28, 30) such that its outlet is larger in diameter than its inlet. The tapered section gradually and linearly reduces the pressure from the reactor to the inlet of the trap filter chamber thereby substantially reducing particulate by-product build-up at the inlet to the trap filter caused by temperature-pressure related precipitation.