Patents by Inventor Emre Ozer

Emre Ozer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260050569
    Abstract: A method of generating a design for a processor in accordance with a subset instruction set architecture is disclosed in which a subset of one or more instructions, from a set of instructions for an instruction set architecture is obtained. A representation of hardware for implementing each instruction of the subset is retrieved from a library that includes a representation of hardware for implementing each instruction of the set of instructions. A further representation of hardware for implementing the processor in accordance with the subset instruction set architecture is generated using the retrieved representations of hardware for implementing the instructions of the subset.
    Type: Application
    Filed: October 24, 2025
    Publication date: February 19, 2026
    Applicant: Pragmatic Semiconductor Limited
    Inventor: Emre OZER
  • Patent number: 12506185
    Abstract: There is provided a battery cell monitoring system comprising a flexible substrate able to conform to a surface of a battery cell to be monitored and wireless communication circuitry to be positioned proximate to a surface of the battery cell and arranged to communicate with one or more other battery cell monitoring systems. The battery cell monitoring system is provided with control circuitry integrated onto the flexible substrate to control the wireless communication circuitry to perform two types of communication. The first of the two types of communication is a local communication between the battery cell monitoring system and each of the one or more other battery cell monitoring systems. The second of the two types of communication is a non-local communication between the battery cell monitoring system and a battery management system routed via inter-cell communication with the one or more other battery cell monitoring systems.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 23, 2025
    Assignee: Arm Limited
    Inventors: Jedrzej Kufel, Emre Ozer, John Philip Biggs, James Edward Myers, Remy Pottier
  • Patent number: 12093121
    Abstract: Methods of performing post-manufacturing adaptation of a data processing apparatus manufactured in accordance with a processor design and corresponding data processing apparatus configurations are provided. Post-manufacturing testing of the data processing apparatus determines any dysfunctional instructions by comparison between component usage profiles for each instruction and a component fault-detection procedure applied to the data processing apparatus. The data processing apparatus can be determined nevertheless to be operationally viable when any dysfunctional instructions can be substituted for by emulation using other functional instructions. The data processing apparatus can be provided with dysfunctional instruction handling circuitry configured to identify occurrence of a program instruction instance of a dysfunctional instruction and to invoke an interrupt handling routine associated with the dysfunctional instruction to emulate the instance of a dysfunctional instruction.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: September 17, 2024
    Assignee: Arm Limited
    Inventors: Emre Ozer, Mbou Eyole, Jedrzej Kufel, John Philip Biggs
  • Patent number: 11996527
    Abstract: A battery cell monitoring system comprises a flexible substrate able to conform to a surface of a battery cell to be monitored, and a plurality of first-level prediction units integrated onto the flexible substrate, where each first-level prediction unit is positioned at a different location on the flexible substrate to each other first-level prediction unit. Each first-level prediction unit comprises at least one sensor to generate sensor signals indicative of a physical state of the battery cell, and first-level prediction circuitry to generate a predicted battery cell status value in dependence on the sensor signals received from the at least one sensor of that first-level prediction unit.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: May 28, 2024
    Assignee: Arm Limited
    Inventors: Emre Ozer, Remy Pottier, Jedrzej Kufel, John Philip Biggs, James Edward Myers
  • Patent number: 11969030
    Abstract: Wearable items and methods of monitoring wearable items are disclosed. The wearable item comprises a flexible base material forming at least a portion of the wearable item, plural conductive traces traversing the flexible base material, and conductivity sensing circuitry coupled to the plural conductive traces. The conductivity sensing circuitry is configured to distinguish conductivity from non-conductivity of the plural conductive traces, and configured to generate a conductivity indication for at least one of the plural conductive traces. The plural conductive traces follow indirect paths across the flexible base material, allowing the flexible material to flex and stretch normally without breaking the conductive traces.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 30, 2024
    Assignee: Arm Limited
    Inventors: Emre Ozer, Jedrzej Kufel, James Edward Myers, Remy Pottier, John Philip Biggs
  • Publication number: 20230367394
    Abstract: Wearable devices, systems of wearable devices, and methods of operating the same are disclosed. A first wearable device worn in contact with the user’s skin monitors the user and comprises a transmission electrode in contact with the user’s skin. A second wearable device comprises a reception electrode worn in contact with the user’s skin. The first wearable device can apply an alert signal to the transmission electrode and measures a transmission current at the transmission electrode. The second wearable device monitors an electrical status of the reception electrode and when the alert signal is detected applies an alert response signal to the receiver electrode. The first wearable device identifies application of the alert response signal to the receiver electrode by measurement of a variation of the transmission current at the transmission electrode whilst the alert signal is applied to the transmission electrode.
    Type: Application
    Filed: May 5, 2023
    Publication date: November 16, 2023
    Inventors: Emre OZER, Parameshwarappa Anand Kumar SAVANTH, Jedrzej KUFEL, Sahan Sajeewa Hiniduma Udugama GAMAGE, John Philip BIGGS
  • Publication number: 20230238589
    Abstract: There is provided a battery cell monitoring system comprising a flexible substrate able to conform to a surface of a battery cell to be monitored and wireless communication circuitry to be positioned proximate to a surface of the battery cell and arranged to communicate with one or more other battery cell monitoring systems. The battery cell monitoring system is provided with control circuitry integrated onto the flexible substrate to control the wireless communication circuitry to perform two types of communication. The first of the two types of communication is a local communication between the battery cell monitoring system and each of the one or more other battery cell monitoring systems. The second of the two types of communication is a non-local communication between the battery cell monitoring system and a battery management system routed via inter-cell communication with the one or more other battery cell monitoring systems.
    Type: Application
    Filed: January 26, 2022
    Publication date: July 27, 2023
    Inventors: Jedrzej KUFEL, Emre OZER, John Philip BIGGS, James Edward MYERS, Remy POTTIER
  • Publication number: 20230185651
    Abstract: Methods of performing post-manufacturing adaptation of a data processing apparatus manufactured in accordance with a processor design and corresponding data processing apparatus configurations are provided. Post-manufacturing testing of the data processing apparatus determines any dysfunctional instructions by comparison between component usage profiles for each instruction and a component fault-detection procedure applied to the data processing apparatus. The data processing apparatus can be determined nevertheless to be operationally viable when any dysfunctional instructions can be substituted for by emulation using other functional instructions. The data processing apparatus can be provided with dysfunctional instruction handling circuitry configured to identify occurrence of a program instruction instance of a dysfunctional instruction and to invoke an interrupt handling routine associated with the dysfunctional instruction to emulate the instance of a dysfunctional instruction.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 15, 2023
    Inventors: Emre OZER, Mbou EYOLE, Jedrzej KUFEL, John Philip BIGGS
  • Publication number: 20230172287
    Abstract: Wearable items and methods of monitoring wearable items are disclosed. The wearable item comprises a flexible base material forming at least a portion of the wearable item, plural conductive traces traversing the flexible base material, and conductivity sensing circuitry coupled to the plural conductive traces. The conductivity sensing circuitry is configured to distinguish conductivity from non-conductivity of the plural conductive traces, and configured to generate a conductivity indication for at least one of the plural conductive traces. The plural conductive traces follow indirect paths across the flexible base material, allowing the flexible material to flex and stretch normally without breaking the conductive traces.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 8, 2023
    Inventors: Emre OZER, Jedrzej KUFEL, James Edward MYERS, Remy POTTIER, John Philip BIGGS
  • Publication number: 20230178819
    Abstract: A battery cell monitoring system comprises a flexible substrate able to conform to a surface of a battery cell to be monitored, and a plurality of first-level prediction units integrated onto the flexible substrate, where each first-level prediction unit is positioned at a different location on the flexible substrate to each other first-level prediction unit. Each first-level prediction unit comprises at least one sensor to generate sensor signals indicative of a physical state of the battery cell, and first-level prediction circuitry to generate a predicted battery cell status value in dependence on the sensor signals received from the at least one sensor of that first-level prediction unit.
    Type: Application
    Filed: December 2, 2021
    Publication date: June 8, 2023
    Inventors: Emre OZER, Remy POTTIER, Jedrzej KUFEL, John Philip BIGGS, James Edward MYERS
  • Publication number: 20220398409
    Abstract: Apparatuses and methods for supporting class prediction based on multiple items of feature data are provided. Learning phase training data with known classification are used as inputs. Each event of the training data maps multiple items of feature data to encodings, where a range of values for each feature input are mapped to a given encoding. The concatenated encoding for the event form a joint feature item. Class counters are used to count class known to associated with the training event for the joint feature item in a table. At the conclusion of the training phase the class counter values enable a predicted class to be associated with each joint feature item in the table. In the inference phase the table is used for class prediction generation for new data events. The inference phase may be implemented in hardware which has less data handling capability than in the learning phase.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 15, 2022
    Inventor: Emre OZER
  • Patent number: 11514362
    Abstract: A safety-based prediction apparatus, system and method are provided. A machine learning hardware accelerator (MLHA) includes a main classifier (MC) module, at least one guardian classifier (GC) module, and a final predicted class decision module. The MC module predicts an MC predicted class based on input data, and includes a pre-trained, machine learning main classifier (MLMC) that has at least one safety critical (SC) class and a plurality of non-SC classes. Each guardian classifier (GC) module is associated with an SC class, and predicts a GC predicted class based on the input data. Each GC module includes a pre-trained, machine learning guardian classifier (MLGC) having two classes including an associated SC class and a residual class that includes any non-associated SC classes and the plurality of non-SC classes. A decision module determines and outputs a final predicted class based on the MC predicted class and each GC predicted class.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: November 29, 2022
    Assignee: Arm Limited
    Inventor: Emre Ozer
  • Patent number: 11176012
    Abstract: Briefly, example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, to determine indicators of potential errors in a multi-processing core lockstep computing device comprising a plurality of processing cores, based, at least in part, on observations of output signals generated by at least two processing cores of the plurality of processing cores. A built-in self-test (BIST) procedure may then be based, at least in part, on the determining indicators.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: November 16, 2021
    Assignee: Arm Limited
    Inventors: Emre Ozer, Xabier Iturbe, Balaji Venu
  • Patent number: 11061852
    Abstract: A method of reconfiguration and a reconfigurable circuit architecture comprising a configurable volatile storage circuit and Non-Volatile Memory circuit elements; wherein the Non-Volatile memory circuit elements store multiple bit states for re-configuration, the multiple bit states being read from the Non-Volatile memory circuit elements and written into the configurable volatile storage circuit for reconfiguration. The Non-Volatile Memory circuit elements and the configurable volatile storage circuit are provided on a common die.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: July 13, 2021
    Assignee: Arm Limited
    Inventors: Mbou Eyole, Emre Ozer, Xabier Iturbe, Shidhartha Das
  • Publication number: 20210138464
    Abstract: A fluid delivery control device comprising; (i) at least one inlet portal to allow fluid passage into a chamber; (ii) at least one outlet portal to allow fluid passage from the chamber; (iii) at least one biosensor; (iv) at least one actuator; and wherein the at least one biosensor is in fluid communication with said fluid and is associated with a valve having actuator capability, the valve having actuator capability being in communication with sensor measured conditions upon which the valve permits or inhibits delivery of the fluid from the chamber.
    Type: Application
    Filed: May 7, 2019
    Publication date: May 13, 2021
    Applicant: Arm Limited
    Inventors: Emre Ozer, Milosch Meriac, Hugo John Martin Vincent
  • Publication number: 20210125097
    Abstract: A safety-based prediction apparatus, system and method are provided. A machine learning hardware accelerator (MLHA) includes a main classifier (MC) module, at least one guardian classifier (GC) module, and a final predicted class decision module. The MC module predicts an MC predicted class based on input data, and includes a pre-trained, machine learning main classifier (MLMC) that has at least one safety critical (SC) class and a plurality of non-SC classes. Each guardian classifier (GC) module is associated with an SC class, and predicts a GC predicted class based on the input data. Each GC module includes a pre-trained, machine learning guardian classifier (MLGC) having two classes including an associated SC class and a residual class that includes any non-associated SC classes and the plurality of non-SC classes. A decision module determines and outputs a final predicted class based on the MC predicted class and each GC predicted class.
    Type: Application
    Filed: October 28, 2019
    Publication date: April 29, 2021
    Applicant: Arm Limited
    Inventor: Emre Ozer
  • Patent number: 10810094
    Abstract: Examples of the present disclosure relate to a method for anomaly response in a system on chip. The method comprises measuring a magnitude of a transient anomaly event in an operating condition of the system on chip. Based on the magnitude it is determined, for each of a plurality of components of the system on chip, an indication of susceptibility of that component to an anomaly event of the measured magnitude. Based on the determined indications of susceptibility for each of the plurality of components, an anomaly response action is determined. The method then comprises performing the anomaly response action.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: October 20, 2020
    Assignee: Arm Limited
    Inventors: Milosch Meriac, Xabier Iturbe, Emre Ozer, Balaji Venu, Shidhartha Das
  • Publication number: 20200226095
    Abstract: A method of reconfiguration and a reconfigurable circuit architecture comprising a configurable volatile storage circuit and Non-Volatile Memory circuit elements; wherein the Non-Volatile memory circuit elements store multiple bit states for re-configuration, the multiple bit states being read from the Non-Volatile memory circuit elements and written into the configurable volatile storage circuit for reconfiguration. The Non-Volatile Memory circuit elements and the configurable volatile storage circuit are provided on a common die.
    Type: Application
    Filed: September 25, 2018
    Publication date: July 16, 2020
    Applicant: Arm Limited
    Inventors: Mbou Eyole, Emre Ozer, Xabier Iturbe, Shidhartha Das
  • Publication number: 20200218625
    Abstract: Briefly, example methods, apparatuses, and/or articles of manufacture are disclosed that may be implemented, in whole or in part, to determine indicators of potential errors in a multi-processing core lockstep computing device comprising a plurality of processing cores, based, at least in part, on observations of output signals generated by at least two processing cores of the plurality of processing cores. A built-in self-test (BIST) procedure may then be based, at least in part, on the determining indicators.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Inventors: Emre Ozer, Xabier Iturbe, Balaji Venu
  • Patent number: 10657010
    Abstract: An apparatus 2 comprises at least three processing circuits 4 to perform redundant processing of a common thread of program instructions. Error detection circuitry 16 is provided comprising a number of comparators 22 for detecting a mismatch between signals on corresponding signal nodes 20 in the processing circuits 4. When a comparator 22 detects a mismatch, this triggers a recovery process. The error detection circuitry 16 generates an unresolvable error signal 36 indicating that a detected area is unresolvable by the recovery process when, during the recovery process, a mismatch is detected by one of the proper subset 34 of the comparators 22. By considering fewer comparators 22 during the recovery process than during normal operation, the chances of unrecoverable errors being detected can be reduced, increasing system availability.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: May 19, 2020
    Assignee: ARM Limited
    Inventors: Xabier Iturbe, Emre Ozer, Balaji Venu